Keysight software helps debug DDR4, LPDDR4 devices

Oct. 12, 2015

Santa Rosa, CA. Keysight Technologies today introduced a DDR4 and LPDDR4 debugging software tool that helps memory designers quickly perform JEDEC compliance measurements and determine the root cause of test failures. With the software tool’s quick electrical, timing, and eye-diagram analysis capability, designers can pinpoint and navigate to areas or data signals of interest for further analysis, as well as collection and analysis of statistical data. The debug software runs on Keysight Infiniium 9000A, S-Series, 90000A, V-Series, and Z-Series oscilloscopes.

For engineers who work in the computer, server, and mobile device industries, the new tool makes it easier to debug DDR memory devices. The DDR debug tool also helps save design cost and time by enabling analysis of multiple data-lane eye diagrams to help engineers pick data with smaller eyes for further compliance testing. In addition, the tool lets engineers view multiple data-lane read and write eye diagrams simultaneously.

The N6462A-3FP DDR4 and N6462A-4FP LPDDR4 debug software tools work on saved waveform files from Keysight oscilloscopes or W2531EP DDR4 Compliance Test Bench software. Together with the W2531EP DDR4 Compliance Test Bench software, the debug tool helps solve the problem of simulation and measurement correlation.

“This new DDR debug software tool helps customers find the root cause of their DDR design failures quickly,” said Dave Cipriani, vice president and general manager of Keysight’s Oscilloscope and Protocol Division. “This is a great addition to our DDR solution portfolio and complements Keysight’s DDR simulation software to provide full debugging capability before an engineer releases a design for board fabrication.”

The Keysight N6462A-3FP DDR4 and N6462A-4FP LPDDR4 debug tool is available now as an option for the DDR4 and LPDDR4 Compliance Test Bench software. The debug tool is priced at $2,000.

About the Author

Rick Nelson | Contributing Editor

Rick is currently Contributing Technical Editor. He was Executive Editor for EE in 2011-2018. Previously he served on several publications, including EDN and Vision Systems Design, and has received awards for signed editorials from the American Society of Business Publication Editors. He began as a design engineer at General Electric and Litton Industries and earned a BSEE degree from Penn State.

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