Not everyone needs FinFETs: new life for 200-mm fabs has ATE implications

Oct. 22, 2015

SEMI on Monday published a report titled “Global 200-mm Fab Outlook to 2018.” According to the report, worldwide 200-mm semiconductor wafer fab capacity is forecast at 5.2 million wafer starts per month (WSPM) in 2015 and will expand to 5.4 million WSPM in 2018.

SEMI didn’t report on how this trend might affect the market for backend equipment, but new life for 200-mm fabs could have implications for IC test systems.

Luke Schreier, director of automated test at NI, noted, “The big-iron semiconductor ATE vendors have been directing their investments toward high-end microprocessors and memory test for some time, investing in high-performance architectures that can only be cost-effective when you test extremely high-end parts, many of which are coming in 300-mm wafers.”

However, as SEMI reported, the rapidly increasing number of Internet-enabled mobile devices and the emergence of the IoT is driving demand for sensors, MEMS, analog, power, and related semiconductor devices, which generally do not require leading-edge manufacturing capability. They don’t tend to require expensive big-iron ATE, either.

Schreier at NI elaborated, saying, “As the Internet of Things drives wireless and sensor technologies onto billions of devices, the price pressure on those ICs is extreme while the process technology doesn’t necessarily have to be cutting edge. Consequently, existing 200-mm fabs are in a great position to meet this demand, as long as the ATE capability can be delivered at a price point and with capabilities matched to the application.”

As an alternative to big iron, NI introduced its PXI-based Semiconductor Test System (STS) at NIWeek 2014 and highlighted it at this year’s SEMICON West.

Schreier added, “With the NI Semiconductor Test System, we combine the modularity and flexibility of PXI to achieve a great balance between low cost and the latest instrumentation capability. The software-defined nature of the system extracts performance out of user-programmable FPGAs on our instruments and Xeon processors in the PXI controllers where test times are critical. Our success with RF integrated circuit and MEMS customers is a testament to this approach.”

About the Author

Rick Nelson | Contributing Editor

Rick is currently Contributing Technical Editor. He was Executive Editor for EE in 2011-2018. Previously he served on several publications, including EDN and Vision Systems Design, and has received awards for signed editorials from the American Society of Business Publication Editors. He began as a design engineer at General Electric and Litton Industries and earned a BSEE degree from Penn State.

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