GOEPEL protects Spartan-6 FPGAs against IP theft, cloning

Jan. 8, 2016

GOEPEL electronic now supports Xilinx Spartan-6 FPGAs in protection against potential attackers and theft of IP (intellectual property) through the so-called AES Programmer (Advanced Encryption Standard).

The GOEPEL Xilinx Spartan-6 AES Programmer is a tool integrated into the SYSTEM CASCON JTAG/boundary-scan software platform. It allows programming of the so-called one-time programmable (OTP) eFUSE register with a unique 256-bit AES key, via secure JTAG access. After arming, the FPGA can only accept the encoded bit streams, as the arming of the AES mechanism is an irreversible process. This results in maximum security during the authentication and encryption of your FPGA programming data, as well as once it is safely locked within the device.

High-speed hardware with essential production line reliability and stability is provided through the use of the SCANFLEX JTAG/boundary scan platform. The system offers many possibilities to cover different applications, such as true parallel programming of multiple devices and operation of the JTAG interfaces over long distances and through bed-of-nails fixtures, with no loss of signal integrity, using differential pairs to connect to the target system(s).

AES is an official standard, supported by the National Institute of Standards and Technology and the U.S. Department of Commerce. By using the Xilinx AES feature the FPGA design of the Spartan-6 is protected against potential attackers. Without corresponding AES keys, bit streams cannot be analyzed, whereby the encrypted designs are hedged against re-engineering, cloning, and copying.

Both the hardware and software fully support all other advanced technologies from the GOEPEL Embedded System Access platform, so that the combination of other test procedures such as boundary scan, processor emulation test, and even bit error rate testing of high speed buses on the board are also possible using the same system.



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