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BiTS topics span baking cakes to testing silicon photonics

March 14, 2016

Last week’s Burn-in and Test Strategies Workshop covered a variety of topics, from modeling the thermal environment in a burn-in chamber to a test cell for 81-GHz automotive radar test. Test-cell and high-frequency sessions complemented a total of eight technical sessions over three days, including a session on the Internet of Things, as reported earlier.

Kicking off the high-frequency session, Don Thompson of R&D Altanova brought his company’s perspective as a load-board supplier to the topic. Customers specifying sockets often focus on reliability, repairability, and cost but overlook signal-integrity and power-integrity issues. Signal-integrity issues in transmission lines center on propagation losses, reflections, and radiated energy. Reflections are the primary source of issues for sockets, he said (sockets are short and don’t impose propagation losses proportional to length).

He described three BGA socket options: standard, coax, and elastomer, adding that stamped pins are not a good option because springs are exposed to high-speed signals. He noted that coax sockets are impedance-controlled by design. Elastomer ones cannot be, but paths are so short it doesn’t matter.

As for power integrity, the key, is said, is a consistent low-inductance path to the DUT. Simulation that take into account design aspects such as capacitor models, power-plane routing, and socket performance can help with a successful design.

Also addressing BGA sockets was Noureen Sajid of Johnstech International, who emphasized that an RF test system must incorporate a contactor that has validated RF performance comparable to that of the device under test.

She described a BGA package soldered to a 50-Ω load board, simulated using Ansys HFSS modeling.

She investigated three signal paths: ground-signal, ground-signal-ground, and ground-signal-signal-ground. She looked at the effects of varying ball diameters on insertion loss and return loss for the three paths, and she examined configurations with and without ground planes.

She then accounted for contactor performance, saying that the contactor impedance must be matched to the DUT, and the contactor should have lower return loss and higher bandwidth than the DUT. “System nuances have increasingly significance at higher bandwidths,” she concluded.

FCBGA and WLCSP sockets for an 81-GHz automotive radar test cell were the topics of Jason Mroczkowski of Xcerra. He described progress since his presentation at last year’s BiTS.

He said he sees the automotive market picking up, with ICs going into infotainment as well as safety and collision avoidance systems—the focus of his work. Challenges, he said, include doing test development without DUTs being available, and tri-temp handling at 80 GHz also poses challenges. In fact, he said, “Everything is critical at 80 GHz.”

Over the past year, he said, his team has demonstrated a 76- to 81-GHz instrument with a mmWave socket and has correlated results on three independent testers. As for handling, the team has addressed tri-temp testing, accommodated WLCSP, and dealt with issues related to RF performance sensitivity to z-axis compression.

Mroczkowski said he hopes to provide a further update at BiTS 2017.

Also in the session, Hiroyuki Yamakoshi of S.E.R. Corp. delivered a talk on blind signal analysis using YOROI, which samurai wore to prepare for fighting. Similarly, he said, a signal probe socket (or interposer) must be similarly prepared to measure > 3.5-Gb/s blind signals on 8-mm-pitch devices. The approach involves socket S-parameter data in conjunction with Keysight Technologies’ InfiniiSim technology.

In the BiTS eighth and final session, Jason Cullen of Plastronics noted that for thermal management and control we often use ovens with digital diaplays, but should we trust them? “The answer is absolutely not,” he said, noting that we use meat thermometers when roasting a chicken or perhaps poke a cake with a toothpick to see whether it’s done.

In our laboratory work, he continued, we can and do model the baking process to determine the effects of heat and temperature distribution. He cited a history of the topic of uniform temperature and airflow in previous BiTS workshops.

He added that there are two categories of burn-in sockets—actively cooled and passively cooled. The latter are more susceptible to temperature and airflow variations because they cannot respond to variations in the oven.

He noted that models can help reduce time-to-market and decrease risk of design related issues. Although models won’t correspond 1:1 to real-world performance, they can show trends and opportunities for improvement in designs. He said he’s been able to produce a working model that now needs to be validated with real-world measurements. “Once validated, we can use adjustment factors for available airflow and anticipated temperature to create our thermal models at the socket level,” he concluded.

Next up, Edwin Valderama of Intel discussed WLCSP tri-temp test for RF and non-RF products. He discussed issues such as Pogo-tower setup vs. direct docking, RF bridge beam on a V93000 tester vs. a digital bridge beam, and probe needle vs. Pogo pin. Other issues investigated included hardware planarity, PCB warpage, and optimum test-site layout.

He concluded, “Good understanding of WLCSP product test and challenges with proper consideration of key aspects had helped to enable first and subsequent WLCSP test for Intel products.”

The final technical presentation of BiTS 2016 was titled “A Silicon Photonics Wafer Probing Test Cell.” Jose Moreira of Advantest described work done by his company as well as Tokyo Electron and STMicroelectronics. Moreira provided an overview of silicon photonics technology and then detailed test requirements, probing considerations, volume production challenges, test cell issues, and software requirements.

“To achieve a high failure coverage at a low cost for silicon photonics products it is critical to test at wafer level in a production-worthy test cell that can be deployed in an OSAT environment,” he said. “Silicon photonics requires a merger of traditional digital ATE testing with silicon photonics testing requirements.” He concluded that using standard equipment as much as possible can help keep costs low.

BiTS 2017 is scheduled for March 5-8 in Mesa, AZ.

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