CASCON_GOEPEL_screen

New version of SYSTEM CASCON increases test throughput

July 2, 2018

Jena, Germany. GOEPEL electronic announced that its SYSTEM CASCON software package, which enables embedded JTAG solutions, has received an update. The new version 4.6.8 uses a number of new techniques to more efficiently generate and execute test vectors for various applications. These techniques result in time savings and increased test throughput.

The new software version is optimized for the SCANFLEX II hardware platform, unlocking its full potential. Together, the system enables truly independent parallel scanning on up to eight TAPs (Test Access Ports) simultaneously with a 100-MHz clock frequency and full signal delay compensation. Particularly important for performance is the advanced SPACE III technology for data compression. Test procedures can be significantly accelerated with optimized SYSTEM CASCON control. This benefits complex RAM interconnection tests, massive SVF (serial vector format)-based tests, VarioTAP processor-emulation test procedures, and ChipVORX procedures for FPGA assisted test.

SYSTEM CASCON offers more than 40 tools for boundary-scan/IEEE 1149.x applications including processor emulation test, FPGA assisted test, embedded diagnostics, design validation, debugging, and various in-system programming strategies. This allows the user to develop and run all embedded JTAG solutions technologies in order to test and program complex designs with reduced physical access and on a single platform.

https://www.goepel.com/embedded-jtag-solutions/products/software/system-cascon/?L=1

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