USB Vector Network Analyzer
The LTC6952, LTC6953, LTC6955 and LTC6955-1 family of low jitter, high-performance clock generation and distribution devices support JESD204B subclass 1 clocking applications up to 7.5GHz. These products are suitable for high-speed data converter clocking applications, with a scalable architecture to provide thousands of synchronized low jitter clocks, each with a complementary SYSREF signal. LTC6952: ultralow jitter, 4.5GHz PLL with 11 outputs and JESD204B support. LTC6953: ultralow jitter, 4.5GHz clock distributor with 11 outputs and JESD204B support. LTC6955: ultralow jitter, 7.5GHz, 11 output fanout buffer. LTC6955-1: LTC6955 with additional ÷2 on one output. The LTC6952 is a high performance, ultralow jitter, JESD204B clock generation and distribution device. It includes a phase-locked-loop (PLL) core, consisting of a reference divider, phase-frequency detector (PFD) with a phase-lock indicator, ultralow noise charge pump and integer feedback divider. The LTC6952’s eleven outputs can be configured as up to five JESD204B subclass 1 device clock/SYSREF pairs plus one general purpose output, or simply 11 general-purpose clock outputs for non-JESD204B applications. Each output has its own individually programmable frequency divider and output driver. All outputs can be synchronized and set to precise phase alignment using individual coarse half-cycle digital delays and fine analog time delays. For applications requiring more than eleven total outputs, multiple LTC6952s can be connected using the EZSync™ or ParallelSync™ synchronization protocols. The LTC6953 is the clock distribution function of the LTC6952. The LTC6955 is an 11 output fanout buffer with a parallel interface that selects one of three states per output group: in-phase, 180° out of phase, or power-down. The LTC6955-1 is the same as the LTC6955-1 except one output has an integrated ÷2. All devices are offered in a 52-lead, 7 mm × 8 mm plastic QFN package. Analog Devices
