EDA Update: 90-nm X Architecture Test Chip

Nov. 24, 2003
A functional 90-nm X Architecture test chip has emerged from Toshiba's fab. Compared to a Manhattan version of the same design, the five-metal-layer test chip requires 14% less total wire length and 27% fewer vias. The chip is fully functional at...

A functional 90-nm X Architecture test chip has emerged from Toshiba's fab. Compared to a Manhattan version of the same design, the five-metal-layer test chip requires 14% less total wire length and 27% fewer vias. The chip is fully functional at its specified operating frequency. Having completed its pre-production roadmap, the X Initiative will now turn its attention to enabling broad adoption of the X Architecture. Learn more at www.xinitiative.org.

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