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    Tony 101
    1. Technologies
    2. Test & Measurement

    Timing Jitter 101

    April 28, 2009
    In any system that uses voltage transitions to represent timing information, jitter is an unfortunate part of the equation. In essence, jitter is the deviation of timing edges from their intended locations.
    David Maliniak

    In any system that uses voltage transitions to represent timing information, jitter is an unfortunate part of the equation. In essence, jitter is the deviation of timing edges from their intended locations. Historically, jitter was kept under control by system designers by using relatively low signaling rates. But the timing margins associated with modern high-speed serial communication buses renders such strategies moot. As signaling rates climb above 2 GHz and corresponding voltage swings continue to shrink, a given system’s timing jitter becomes a significant portion of the signaling interval and, hence, a baseline performance limiter.

    A simple and intuitive definition for jitter is part of the SONET specification: “Jitter is defined as the short-term variations of a digital signal’s significant instants from their ideal position in time.” This definition requires thumbnail descriptions of its components.

    Just what is meant by “short-term?” Timing variations are, by convention, split into two categories: jitter and wander. Timing variations that occur slowly are known as wander; jitter refers to variations that occur more rapidly. The threshold between wander and jitter is defined by the International Telecommunication Union (ITU) as 10 Hz. Wander is generally not an issue in serial communication links, where a clock-recovery circuit eliminates it.

    And that odd term “significant instants” refers to the transitions, or edges, between logic states in the digital signal. Significant instants are the exact moments when the transitioning signal crosses a chosen amplitude threshold, known variously as the reference level or decision threshold.

    Finally, the term “ideal position” can be thought of in this way. When speaking of a clock-like signal that alternates between logical 1 and logical 0, the ideal positions conceptually correspond to a jitter-free clock with the same mean frequency and phase as the measured one.

    As a form of noise, jitter must be considered a random process and characterized in statistical terms. Once you have measured jitter statistics in a serial communications link or other digital system, the object of measurement can be compared to other similar systems or to a set of criteria for what the jitter should be. But to properly treat jitter, it must be analyzed so that its root causes are isolated and reduced systematically rather than by trial and error.

    (With permission of Tektronix Inc.; for a full tutorial on Understanding and Characterizing Timing Jitter)

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