As signals traverse at ever higher speeds over digital interfaces, designers face signal-integrity challenges and need to be able to measure jitter and evaluate complex modulation schemes. Instruments including oscilloscopes, bit-error-ratio testers (BERTs), signal analyzers, vector network analyzers, and protocol analyzers as well as software may all have a role to play.
From a high-level perspective when it comes to high-speed I/O test, “speed” is the operative word, according to Tami Pippert, high-speed digital industry marketing program manager at Keysight Technologies. “Speed and its impact on design and performance continue to drive the industry and create new challenges and solutions.” Speed, she said, refers not only to the speeds of the digital links themselves but to the speed at which solutions can be brought to market.
Hiroshi Goto, Anritsu business development manager, focused on a key market driver. “Expansion of core network transmission capacity is an urgent issue driven by the continuing explosive growth of cloud computing and smartphones,” he said.
Patrick Connally, technical marketing engineer for high bandwidth oscilloscopes at Teledyne LeCroy, focused on PAM-4 as a key issue. “PAM-4 poses an interesting test challenge, due to the nature of the four-level PAM-4 signal,” he said. Indeed, PAM-4 was a hot topic a year ago at last January’s DesignCon.1 As for specific types of test equipment, Connally said, “Testing of high-speed serial links and memory interfaces begins with oscilloscopes that are up to the task.”
Chris Nunn, product engineer for modular instruments at National Instruments, cited FPGA-enabled software-defined instruments. “Because of the flexibility provided by software-designed instruments, we can release new IP and toolkits that customers can use with just a software update,” he said.
Citing vector network analyzers’ applicability to signal-integrity measurements was Chris Scholz, a product manager at Rohde & Schwarz North America. He described the characterization of signal integrity in high-speed transmission lines using VNAs to extract S-parameters, which, he said, can provide higher accuracy than can time-domain-based methods.
Getting fast devices to market
With regard to speeding products to market, Pippert cited the constant pressure for Keysight customers to ship as soon as possible. “We are continuously working on our software and compliance applications to improve performance and enable them to run significantly faster and have taken automation to a new level by better integrating switching solutions,” she said.
With regard to the increasing data rates embodied in the technologies of USB 3.1, DDR4/LPDDR3, PCIe, and so on, Pippert said, “Given tighter device margins and speed requirements, continuous advancements to Tx, Rx, interconnect, and simulation are constantly required. Changes are being made to the cable/connector specifications, for example, to manage design challenges and interoperability such as increased rigor in removing fixture effects and dealing with RF interference issues.”
She continued, “Precise and accurate fixture removal is a critical first step in realizing the actual device performance. Too often designers will spend a tremendous amount of time designing the device under test without investing the same amount of time into fixture design and fixture removal techniques.” The result, she said, can be “… noncausal and nonsensical device performance measurements due to reference-plane adjustment mistakes.”
Connally at Teledyne LeCroy elaborated on PAM-4. “The PAM-4 eye diagram comprises three eye openings instead of one and includes 12 types of transitions, whereas NRZ signals have only two,” he said. “Engineers must understand how their transmitters, channels, and links affect PAM-4 eye quality while quantifying the degree of eye closure due to timing jitter and noise as a function of bit-error ratio (BER).” He called Teledyne LeCroy’s PAM-4 analysis tool “unique in the test and measurement market,” adding, “Consider as well that commercial standards implementing PAM-4 technology are still evolving, meaning that standard measurement techniques are still in the process of convergence. Customers have relied on what we can provide to guide them through PAM-4 testing with excellent results.”
Getting to 1 Tb/s
Goto at Anritsu elaborated on the need to expand core network transmission capacity. “To meet this demand, standards organizations, such as IEEE, and leading research organizations are examining next-generation, high-speed transmission technologies at 400 Gb/s and 1 Tb/s using modulation methods such as QAM performing signal modulation in both the phase and amplitude domains simultaneously,” he said.
“Anritsu introduced a number of enhancements to its MP1800A BERT Serial Quality Analyzer to meet high-speed signal integrity testing requirements,” Goto continued. “A new jitter modulation source for the MP1800A generates wide-amplitude SJ up to 1 UI at a jitter frequency of 250 MHz to ensure sufficient margin for receiver jitter tolerance tests. Additionally, the extremely low intrinsic jitter of typically 275 fs rms ensures accurate measurements even at low jitter amplitudes.”
Anritsu, Goto said, provides a synchronization function that allows four MP1800A BERT units—each with a built-in eight-channel 32-Gb/s programmable pattern generator—to be integrated together into an ultrahigh-speed transmission test system. The system in turn supports the multichannel synchronization signals including Quad DP-16QAM and Dual DP-64QAM required for 400-Gb/s and 1-Tb/s transmission tests.
In addition, he said, “Anritsu recently introduced the BERTWave MP2100B, a single solution that features simultaneous BER measurements and eye pattern analyses. The internal BERT function supports BER measurements at speeds ranging from 125 Mb/s to 12.5 Gb/s as well as eye mask and eye pattern measurements.”
VNAs for digital test
Anritsu also offers VNAs for high-speed digital test. “Anritsu is helping customers with creating more accurate models to improve correlation between simulation and measurement with high-quality S-parameters,” said Walt Strickler, product marketing manager at the company. For example, he said, the wide frequency span offered by the VectorStar vector network analyzer, especially the lower frequency range, reduces the risk of DC extrapolation errors in modeling—thereby improving model accuracy and leading to better agreement with 3D EM simulators, accelerating design cycles.
Strickler continued, “Also, many passivity/causality problems are due to poor calibration and de-embedding methods. High fixture loss may affect the accuracy and repeatability of de-embedding. Our VNAs have a complete suite of de-embedding and network extraction tools right on the instrument so there is no need to buy expensive external software to do this.” The VectorStar and ShockLine VNAs, he said, “… offer superior calibration and de-embedding techniques, improving the capability to locate discontinuities, impedance changes, and crosstalk issues.”
Scholz at Rohde & Schwarz cited relevant applications of his company’s VNAs. “High-speed interconnects such as cables and connectors can be contributors to many of today’s signal-integrity challenges,” he said, involving reflection noise caused by impedance mismatches or other interconnect discontinuities as well as crosstalk noise resulting from electromagnetic coupling between paths. “In the signal-integrity community,” he continued, “VNAs have become a de-facto standard for measuring component performance. This is due to their capability to measure very low-level signals accurately as well as the capability to measure very fast rise times. For differential components, four-port single-ended S-parameters are commonly used for describing the electrical properties of any four-port interconnect.”
VNAs can measure a DUT’s S-parameters by determining the amplitude and phase relationships of test signals at the DUT’s ports. “A VNA measures in the frequency domain, which is advantageous for measuring an impulse response,” Scholz said. “VNAs offer an advantage of higher dynamic range due to the lower instantaneous bandwidth required vs. a time-domain reflectometer (TDR) instrument. The TDR analog-to-digital converter limits the frequency response and dynamic range.”
In addition to VNAs, Rohde & Schwarz offers the new R&S FSWP phase noise analyzer and VCO tester (Figure 1) for high-speed test. “The new R&S FSWP phase noise analyzer and VCO tester,” Scholz said, “enables ultrasensitive and ultrafast phase noise measurements. It also allows users to very easily measure pulsed sources and additive phase noise of RF components.”
Courtesy of Rohde & Schwarz
Software tools
Pippert at Keysight cited several new products the company offers for high-speed serial test, including two channel-simulation tools as part of the Advanced Design System (ADS) design automation software: the W2352 for PCIe and W2353 for USB. These products help designers predict whether designs will meet compliance specifications. “Both simulations and measurements use the same methodologies and waveforms to ensure simulation-to-measurement correlation, she said, adding that the software partners with a new oscilloscope line-up, the Infiniium V-Series, which, she said, includes the industry’s longest hardware serial trigger: 160 bits at 12 Gb/s.
To support leading-edge research for 100-Gb/s, 400-Gb/s, and 1-Tb/s communication applications, Pippert said Keysight added a 92-GS/s, 32-GHz modular M8196A arbitrary waveform generator, which allows engineers to create digital, multi-level—for example, PAM-4, PAM-8, discrete multitone—signal scenarios and test their electrical and optical links with complex modulated signals up to 64 GBaud.
Courtesy of Keysight Technologies
“In the USB ecosystem,” Pippert added, “the increase in data rate and the new Type-C connector result in even tougher requirements for the physical layer to ensure interoperability.” Consequently, Keysight has introduced the new N7015A Type-C fixture, supported by the N7016A signal access and control fixture, which manages power and control lines to support termination requirements, test configuration, and connection to a power delivery controller (Figure 2).
And finally, she said, “DDR4 and LPDDR4 continue to push the limits in speed, density, and power. We introduced a U4164A logic analyzer module with the industry’s highest-data-rate state mode, highest timing mode (10 GHz), and deepest memory depth (up to 400 MB) that enables LPDDR4 and DDR4 protocol validation and debugging at data rates proven to 4 Gb/s.”
Scopes for physical layer characterization
Connally at Teledyne LeCroy cited two oscilloscope introductions over the past year, including the 10 Zi-A and 8 Zi-B. “Both of these oscilloscope hardware platforms serve physical-layer characterization, signal-integrity test, and protocol decode; in fact, test of high-speed serial links is the main market for these oscilloscopes,” he said.
Courtesy of Teledyne LeCroy
The 100-GHz, 240-GS/s 10 Zi-A (Figure 3) features an intrinsic (sample-clock) jitter of 50 fs rms and offers a modular ChannelSync architecture that lets users build oscilloscopes with up to 80 channels, with better than 130-fs channel-to-channel jitter. The updated 8 Zi-B, he added, enhances the capabilities of its predecessor with lower noise, higher sampling rates (up to 80 GS/s on models with bandwidth of 16 GHz or more), deeper acquisition memory, and the next generation of the company’s MAUI oscilloscope user interface.
Teledyne LeCroy also has updated its software offerings over the past year, introducing last March its PAM-4 signal analysis tool, which makes essential eye, jitter, and noise measurements on all three eye openings of a PAM-4 signal. The company also introduced a new software suite for USB 3.1 end-to-end test, its UNIPRObus D MIPI protocol decode solution, and its QPHY-HDMI2 compliance test solution for HDMI 2.0.
“We’ve updated QPHY-DisplayPort, our compliance test package for the VESA DisplayPort video standard, to version 1.3 of the compliance test specification,” Connally said. The company also offers its QPHY-eDP, a new compliance test package supporting embedded DisplayPort (eDP), a variant of DisplayPort used for internal interfaces. “With the proliferation of new mobile devices, we have seen a growing appetite among developers for eDP compliance test, especially in notebooks and tablets,” Connally said.
Tektronix also offers oscilloscopes for high-speed digital test and in September announced the expansion of its DPO70000SX performance oscilloscope series to include 50-GHz and 23-GHz models. By extending the flagship 70-GHz model, the company said, the new 50-GHz product is suitable for engineers and researchers who want to take advantage of the low-noise performance of the patented asynchronous time interleaving architecture for technologies such as 28-GBaud PAM-4 and K-band frequency testing. Applications such as validation of high-speed networking technologies used in long-reach fiber systems (DP-QPSK coherent modulation) and shorter-reach (PAM-4) data-center networks require precise multi-instrument timing synchronization, the company said, adding that the DPO70000SX oscilloscopes meet these needs through the patent-pending UltraSync architecture that provides precise data synchronization and convenient operation of multi-unit systems.
Jitter injection and protocol-aware test
Lee McMillan, director of engineering for Noisecom, said the company has developed a number of new custom instruments that cover the IEEE specs for jitter injection, with 100Gbase-KR4 and PAM-4 being recent applications. “We help our customers by providing a broadband Gaussian noise generator with a high crest-factor, which is used in jitter-related tolerance tests,” McMillan said.
Courtesy of National Instruments
Nunn at NI cited two high-speed PXI Express serial modules: the PXIe-6591R featuring eight channels with line rates up to 12.5 Gb/s and the PXIe-6592R (Figure 4) with four channels with line rates up to 10.3125 Gb/s. “With the power of an open, user-programmable FPGA, the PXIe-6591R and PXIe-6592R offer the flexibility of testing both standard and custom serial interfaces up to 12.5 Gb/s,” he said. “These cards excel at protocol-aware test and lightweight characterization where price and fast measurement times are key concerns.”
Designers of high-speed digital devices may, at times, find it convenient to have relatively low-frequency tools available outside the lab. Nunn explained, “NI also identified a general-purpose use case, giving engineers access to a standard set of instrumentation at their desks. With the launch of VirtualBench, NI developed a fully featured interactive UI that connects via USB or Wi-Fi to a suite of instruments all contained within a single hardware product. Efficiency gains combining hardware and leveraging the user’s laptop or tablet for display make this available at a very low price point.” VirtualBench contains five instruments—an oscilloscope, a signal generator, a DMM, a logic analyzer, and DIO ports—and it is the logic analyzer that has received some of the most feedback, Nunn said, adding, “One advantage of the software-defined approach is that based on this feedback, in subsequent free software releases, we were able to add protocol decode for SPI and I2C on the logic analyzer, with more to come.”
Demonstrations at DesignCon
DesignCon 2016 in January in Santa Clara will provide companies with an opportunity to demonstrate their products for high-speed digital test. For example, McMillan said, Noisecom will demonstrate the J7000 jitter generator for signal-integrity measurements and the JV9000 noise-on-Vcc generator for power-integrity measurements. And Teledyne LeCroy will concentrate on DDR, USB 3.1, PCIe, MIPI M-PHY, and PAM-4.
Anritsu will exhibit its MP1800A BERT and MP1825B 4Tap Emphasis instrument as well as a PAM-4 BER test solution with emphasis for high-speed backplane/interconnect testing. The company also will exhibit VectorStar and ShockLine VNAs and highlight its collaboration with new software partner AtaiTec, whose signal-integrity software, such as the ADK Advanced SI Design Kit, enables users to create eye diagrams from their S-parameter measurements.
Keysight, Pippert said, will introduce new simulation software as part of ADS that more accurately models serial-bus channels and associated power-distribution networks to support power integrity and signal integrity engineers. The company also will present new software solutions that enable crosstalk analysis on oscilloscopes. Also on display will be new PLTS software that performs calibration, measurement, automatic fixture removal, and analysis of high-speed digital interconnects with VNAs. In addition, Keysight will address the Type-C challenge with respect to power delivery and cable test and the continuing evolution of PAM-4 and 100G to 400G solutions.
NI will showcase a built-in statistical eye scan feature of the 659xR hardware, which allows users to analyze link margin of their serial link. Also on display will be the PXI-6591R controlling a TI DAC38J84 high-speed DAC through the JESD204B protocol.
“We also will be featuring a higher performance variant of the VirtualBench all-in-one instrument,” Nunn said. “Enhancements across the instrumentation suite include the capability to playback waveforms captured on the 350-MHz oscilloscope and new visualization of time-domain signals.”
And Rohde & Schwarz, Scholz said, will demonstrate SI solutions for crosstalk and jitter measurements and high-bit-rate channel characterization. The company will offer seminar sessions on phase noise and jitter measurements, in-situ de-embedding, PCB probing for signal-integrity measurements, and characterization of signal integrity using S-parameters.
Visit www.evaluationengineering.com for updates.
Reference
- Nelson, R., “DesignCon highlights all things high-speed-digital,” EE-Evaluation Engineering, April 2015, p. 12.
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