The Nebula silicon debugger speeds test-vector debug time from weeks to half a day through its direct knowledge of on-chip design-for-test (DFT) structures and integrated use of Synopsys' TetraMAX ATPG patterns and diagnostics. It enables remote testing of prototype silicon for stuck-at-faults, path-delay faults, at-speed built-in self-test, and in-situ functional bebug. Failures can be quickly isolated to the gate and net level. A "smart tester" architecture allows it to understand the difference between serial scan and parallel pin test data. The Nebula starts at $50,000 for desktop hardware and a floating license.