Handy Circuit Simplifies Frequency-Ratio Measurement

Dec. 18, 2003
In many instrumentation systems, the ratio of two frequencies has more significance than the two individual frequencies. One such application is the ratiometric capacitive sensor. In this case, two frequencies, F1 and F2, are generated inversely...

In many instrumentation systems, the ratio of two frequencies has more significance than the two individual frequencies. One such application is the ratiometric capacitive sensor. In this case, two frequencies, F1 and F2, are generated inversely proportional to the capacitors C1 and C2.

However, you don't need an expensive computing device to determine the frequency ratio. The simple circuit of Figure 1 can do the job very accurately. Moreover, it provides an output voltage that can be directly read by a digital panel meter or a digital voltmeter.

Here's how the circuit operates. The counter (IC1, a CD4017BE) divides the frequency F1 (F1 < F2) by a factor of five to generate a frequency Fd (F1 = 5Fd). The D-flip-flops FFa and FFb (IC2, a CD4013BE) are clocked by Fd and F2, respectively.

Every positive transition of the Fd clock sets FFa (Fig. 2). The next positive transition of the F2 clock transfers the logic 1 level of Qa's output to Qb's output. Now, FFa is reset. Qb's output remains high until the next positive transition of the F2 clock transfers the logic 0 level of Qa's output to Qb's output. Thus, at the Qb output, pulses (Qb pulses) are generated with widths equal to the period of one F2 clock pulse.

Because Fd and F2 aren't synchronized to each other, the position of Qb pulses keeps varying with respect to the Fd clock edges. But keeping Fd < 0.5F2 will ensure that Qb pulses don't spill over from one Fd clock period to the next. Consequently, each Fd clock generates one Qb pulse. The duty cycle (η) of Qb pulses is given by:

η = pulse width/period
   = period of one F2 clock pulse/period of one Fd clock pulse
   = Fd/F2.

Since the flip-flop IC is a CMOS device, the pulses switch between ground and VDD. The integrator (R1C1) averages the Qb pulses to supply an output, VO = VDD × η. Note that capacitor C1 must be a low-leakage type. By keeping VDD = 5.000 V:

VO = 5(Fd/F2) = 5F1/5F2 = F1/F2

The circuit works for a wide frequency-ratio range of 0.005 ≤ F1/F2 ≤ 2.5 and a wide frequency range of 100 Hz ≤ (F1, F2) ≤ 1 MHz, with an accuracy of about 0.2 % (see the table). For higher-frequency inputs, use counter ICs to bring down the frequencies to less than 1 MHz.

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