Applications of commercially available integrated timers, including the NE/SE555, are fairly limited when used in their monostable mode. This is due to their inability to function with all types of trigger pulses. These timers work perfectly and produce accurate outputs, as long as the input pulse is small compared to the set time period. However, when the input pulse has a longer period than the timer's period, the output pulse width depends on the duration of the input pulse width. This is clearly undesirable as several practical applications require the timer to produce an accurate output pulse, irrespective of the duration of trigger input.
The circuit shown in the figure can be used to ensure correct operation of the timer with all types of trigger pulses. It uses the inherent setup delays of logic elements to provide an input-trigger lockout facility for the 555 timer. This ensures that the timer is triggered only once for any input pulse with a duration greater than 10 ns.
A close look at the circuit reveals that it consists of a discrete D-type flip-flop formed by NAND gates U1a-U1c. The setup delay of the LS series gates is around 10 ns. This causes the settling time of the D-type flip-flop to be about 28 ns, ignoring the connection delays. U1d uses this time delay to produce a single, low-going pulse with a duration of 10 to 28 ns. This pulse is sufficiently long to trigger the 555 timer once. Thus, the timer is protected against retriggering from the same input pulse.
Note, however, that this circuit works only with a rising edge at the Trigger input. If the circuit has to provide falling-edge triggering, an inverter is required at the Trigger input.
The trigger-lockout circuit will find applications in situations where a long pulse is to be converted into a fixed-duration shorter pulse. The output of a 555 timer fitted with this circuit can also serve to debounce an array of single-pole, single-throw switches. Although primarily intended for the NE/SE555 timer, this circuit can also be used with any other timer circuit that works on transistor-transistor logic (TTL) switching levels. Additionally, CMOS timers can be attached to this circuit if the specified TTL integrated circuit is replaced by its CMOS counterpart (CD4011).