The telecommunications market is demanding and dynamic, with twin forces-rapid expansion and quality expectations-creating an enormous challenge for designers. These engineers work at the cutting edge of network and wireless technology. At the same time, they must produce advanced products at lower costs, and on schedules that are measured in months, and sometimes only weeks. Moreover, the product must work right the first time, with no exceptions, otherwise the opportunity for market domination can be completely lost.
Aware of these relentless demands, telecommunications designers rely heavily on simulation to ferret out the hidden flaws in a device before it goes into production. Simulation does not, however, provide a complete picture of a system's real-world performance. There are just too many variables—both in design and manufacturing—to effectively simulate a product's behavior without the aid of hardware.
The best way to thoroughly examine a design is to couple simulation with rigorous prototype testing. This is accomplished by completely characterizing the device or system on both the physical and protocol layers. The designer also must stress test the product to ensure its operation under such adverse conditions as jitter, bit-pulse impairments, code violations, and noise.
Using an arbitrary waveform generator (AWG) to quickly create an unlimited range of waveform stimuli is one of the best ways to enhance prototype testing of a telecom system. Unlike a bit-error-rate tester (BERT), an AWG can go beyond ideal signals and generate the anomalies, intersymbol effects, jitter, and signal degradation that occur in the real world, helping the telecom designer fully determine the performance of a product under actual operating conditions.
For example, acceptable data communications signal tolerances for network physical-layer testing are well defined by industry standards. However, most current protocol analyzers or BERTs do not test bit pulse extremes as defined by the industry pulse-mask standards. An AWG, on the other hand, simulates serial data signals and tests a device with the pulse extremes to standards. This limit testing is extremely useful in verifying that a device or system truly conforms to a telecom standard.
It is important to note that an AWG does not eliminate the need for a BERT or protocol analyzer. The reason behind this is that a 1-GHz AWG's analog output supports physical-layer testing of communications data rates up to 250 MHz, providing four points per cycle. Instead, an AWG complements existing test tools such as a BERT and digital storage oscilloscope (DSO), helping to extend the range of testing that a designer can perform. This is possible because modern AWGs seamlessly interact with other test and measurement instruments, exchanging pertinent information between them (Fig. 1).
An AWG can be synchronized with a BERT, and used to stimulate a device under test (DUT), with the BERT receiving, analyzing, and displaying the output from the system. A typical prototype test scenario is as follows: First, the designer uses the BERT to perform protocol testing. Then, moving to the physical layer, the designer either selects from the AWG internal library, or downloads simulation vectors directly into the AWG.
Using the isolated bit-pulse impairment features of a modern AWG, the generator then creates those vectors needed for "what if" scenarios and stress testing of the prototype. The AWG creates serial-data signals, for example, to determine if the DUT complies with the specified telecom pulse-mask standard. The designer also quickly tests for different loading and possible worst-case scenarios, such as fading in a wireless design. Testing for peak or region shifting and all types of jitter or jitter modulation can also be performed, including tests for low- and high-frequency jitter, and jitter on an individual or isolated bit.
If there is a performance issue, an AWG significantly streamlines the task of isolating and debugging the problem. In conjunction with a BERT and a DSO, the AWG creates a full debugging environment, eliminating the need for special or custom debug circuitry, or combinations of multiple signal generators. First, the DUT can be stimulated with the BERT's transmitter section. If an error occurs, the advanced logic or mask triggering capabilities of the DSO will trigger and capture the aberrant behavior. In this way, the conditions that caused the error can be recreated by the AWG on a repetitive basis, enabling the designer to quickly zero in on the source of the error. This combination is particularly powerful when the error-generating events occur infrequently.
With all they have to offer, you would think that AWGs would be part of every telecom designer's suite of test tools. But the fact is they are not.
Until just a few years ago, AWGs did not offer the performance required for telecom applications. Fortunately, today's AWGs change all that. The newest AWGs deliver the advanced capabilities required for telecom testing—up to 250-MHz data standards using the analog outputs, and up to 1-GHz parallel data rates when using the digital output. Many new electrical telecom standards now exceed 1 GHz, such as fiber-distributed data interface (FDDI) and Ethernet. Optical standards are going way beyond that, making it is absolutely essential that an AWG be able to keep pace.
Modern AWGs also supply sufficient vertical resolution (some up to 10 bits at 1 GHz) to allow telecom designers to go beyond idealized square waves, and precisely create extreme, real-world conditions such as high-frequency jitter and noise. Using these examples of worst-case telecom signals, the designer can quickly determine the robustness of an application.
Along with enhanced throughput and vertical resolution, leading-edge AWGs support extremely long record lengths. These deep memories let the designer recreate the message stream more completely with its pulse shape and information content. Longer record lengths eliminate having to sacrifice simulation accuracy by providing enough storage capacity for fast, detailed waveforms.
Some of the newest AWGs go beyond simply improving overall performance by providing specialized features tailored for telecom applications. A few even have built-in telecom standards. The AWG 500 Series from Tektronix, for example, supports DS1, DS3, STS1, and many more standards. New, emerging standards also can be added using a floppy disk or the built-in Ethernet port.
Along with standards, the leading-edge AWGs provide real-time sequencing that allows for essentially infinite record lengths. Sequencing capability has been around for some time. Basic sequencers execute simple functions like looping, which allows for the limited repetition of waveforms in memory. More advanced sequencers also allow the concatenation of multiple signals to form more complex waveforms. However, both of these types of sequencers require their content be compiled and stored into memory as a single waveform file. To execute 64,000 repetitions of a waveform that has been constructed from 1,000 data points would, when compiled, require a 64 Mword memory.
That's not the case with a real-time sequencer, which requires only 1000 words of memory to store the defining wavepoints. The AWG then uses an internal counter to perform 64,000 loops on the record. This type of architecture can be compared to a computer routine capable of executing loops, jumps, Go Tos, and similar instructions. Thus, memory requirements are significantly reduced, and the effective record length can handle almost infinite data stream lengths.
With a real-time sequencer, the AWG provides yet another advantage to telecom applications: the ability to respond immediately to error conditions from the DUT. With a dedicated 4-bit jump (error) input, the AWG provides up to 16 different programmed states through the sequencer, which can respond with predefined jumps to subroutines within the memory. A complete characterization procedure can, therefore, be designed around a sequence that iteratively widens or narrows a nominal pulse toward a mask's outer violation boundary until an error condition is detected through either the DUT, BERT, or DSO. The AWG sequencer might then respond by jumping to a debug routine. In this case, the AWG brings a high level of repeatability and automation to an otherwise difficult characterization task.
The primary output of the AWG is, of course, analog, even when the desired signal is essentially a serial data stream. Frequently, however, telecom devices also require concurrent testing of digital trigger, gate, or clock inputs. For this reason, modern AWG architectures also provide from 10 to 24 channels of phase-synchronous digital output with clock speeds up to 1 GHz, and pattern depths of up to 4 Mwords.
Other telecom-related capabilities now available include built-in digital filtering. With this feature, designers can apply different filter distributions to the output and edit in the frequency domain. As a result, the telecom designer can quickly create "what-if" signal response conditions to fully exercise the prototype device or system. These filters also can be used to band-limit the AWG's built-in random noise generation when stress-testing the system. With the AWG 500 Series, this noise generation is truly random, as opposed to pseudo-noise generation, which is constrained by the generator's clock resolution. Some AWGs even provide comprehensive telecom jitter generation—from worst-case, single-bit to overall jitter—making it easier for the designer to create precise timing and amplitude impairments caused by jitter.
Testing A SONET Chip
All these waveform generation capabilities make AWGs extremely useful for thoroughly characterizing a telecom system during the prototype stage. The discussion that follows illustrates a real-world application. The example involves a stress test of a SONET transceiver chip designed for the STS-1 standard, where an AWG can be used to simulate the electrical signal prior to optical conversion. This particular chip was part of a larger system designed for the telecom market.
First, a BERT was used for the initial tests on the chip, which demonstrated infrequent, excessive bit-error conditions. The BERT did not, however, provide a clear reason for the failure, and due to the infrequency of the problem it was impossible to isolate or debug the cause. At this point, designers begin tracing back through the design to find the root of the occasional high error rates. While BERTs and protocol analyzers provide error counting and pass/fail test results, they do not provide the critical insight about the device's electrical signal that caused the error.
The designers first suspected a physical-layer problem, and decided to stress the circuit under test with an AWG. Their goal was to create signals that, when applied to the test circuit, would increase the frequency of error conditions. This would be accomplished by testing with a data stream where elements were constructed from a series of varying pulse shapes. These pulse shapes are designed to stress the circuit to STS-1 Bellcore mask standards.
Telecom signal creation using an AWG consists of three steps. First, we choose the desired nominal pulse shape, STS-1 in our example. Second, we select either an ideal data stream from the built-in AWG library or download a simulation with the appropriate timing elements. Finally, we use the super position capability of the AWG to convolve the two signals to form the final test signal.
The testing in our example started with a bit stream constructed with the STS-1 nominal pulse shapes selected from the AWG's internal library. The results provided infrequent error conditions similar to those observed with the BERT transmitter output.
Next, the equation editor was used to define the two outer zones of the STS-1 wide pulse mask. The waveform stressed the wide portion of the Bellcore mask standard. To do so, the wide pulse created was significantly longer than the pulse template because the template allowed the trailing end of the waveform to have a dc offset. Several unit intervals were used after the end of the defined pulse template to bring the dc level back down to zero so that there would be no nonphysical abrupt transitions in the resulting waveform after convolution.
Finally, using the graphic editor, the designers generated a waveform that stressed the narrow limits of the standard. Note the difference in the time scale between the wide pulse in Figure 3b and the narrow pulse shown in Figure 3a. The built-in waveform definition capability, like the convolution and equation editor, made it possible to develop and complete new tests in just a matter of hours as data became available on the type of waveforms that were causing the problems. Previously, designers would have had to laboriously piece these waveforms together using unwieldy text editors.
With these waveforms, the designers were able to efficiently test the chip to the limits of the STS-1 standard, and to observe how the device behaved under these stress conditions. The output from the AWG was connected to the SONET transceiver chip using a 75-ohm terminator. The output of the transceiver was connected to a BERT to measure the bit error rate.
Using the AWG-generated input, the evaluation testing clearly showed that the problem stemmed from a defect in the transceiver chip design. The errors were due to the chip's inability to accept a valid signal at the widest limit of the STS-1 Bellcore mask. After determining that, the designers were able to quickly rectify the problem. Without the AWG, the designers could have spent days, or even weeks, trying to find the design defect. By identifying problems like this one early in the design cycle, the designers gained confidence in the robustness and reliability of their final telecom product.
These examples demonstrate that telecommunications designers who have considered an AWG in the past, and found them lacking, should reconsider adding a state-of-the-art AWG to their bench. The newer instruments' functionality and ease of use provide a much more effective and efficient means for fully characterizing and debugging telecom designs.