IP Core Implements JPEG2000 Encoder

June 1, 2002
Compliant with the ISO/IEC 15444-1 standard JPEG2000 image coding system, the CS6510 is said to be the first hardware-accelerated wavelet transform-based JPEG2000 encoder core for advanced still and motion image compression applications, such as

Compliant with the ISO/IEC 15444-1 standard JPEG2000 image coding system, the CS6510 is said to be the first hardware-accelerated wavelet transform-based JPEG2000 encoder core for advanced still and motion image compression applications, such as dual-mode still/movie-clip multi-megapixel digital cameras, 4G/3G medical imaging systems, and office equipment. The IP core can interface with any embedded host processor to construct a complete JPEG2000 encoding system-on-a-chip. It carries out computational-intensive tasks, such as wavelet transform, entropy coding, quantization, and data scheduling, leaving the system processor to handle simple tasks, such as managing the user interface and output data formatting. When fabricated using a 180-nm CMOS process, the CS6510 core delivers data encoding rates up to 60 MSPS on 8-bit samples with real-time lossy image compression ratios up to 50:1. The core can also handle arbitrary image sizes up to 231 x 231 pixels, as well as a wide variety of grayscale and color imaging formats. For more details, contact Ron Sailors at AMPHION SEMICONDUCTOR LTD., San Jose, CA. (408) 392-8982.

Company: AMPHION SEMICONDUCTOR LTD.

Product URL: Click here for more information

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