Latest from Embedded

Dreamstime_Prostockstudio_371930154
dreamstime_ai__prostockstudio_371930154
100269668 © Ronstik | Dreamstime.com
promo_100269668__ronstik__dreamstime
ID 66792575 © Anton Matveev | Dreamstime.com
helicoptercontrolpanel_dreamstime_l_66792575
Dreamstime_Iuliia-Chernyshenko_156096018
dreamstime_iuliiachernyshenko_156096018
ID 9517116 © Plmrue | Dreamstime.com
vu_meter_dreamstime_l_9517116
Future of Memory and Storage
promo__fms_2025__fmsnew
ID 107744852 © Ekkasit919 | Dreamstime.com
adas_dreamstime_l_107744852
Achronix and Dreamstime_funtapp_121372949
662bd922ddea88001ec7b5da Database Dreamstime Funtapp 121372949 Promo

Redefining SmartNICs: The Composable Advantage (Download)

April 26, 2024

Read this article online.

SmartNIC is a programmable device that connects a server’s CPU complex to a network. A composable SmartNIC adds enhanced flexibility, which means that everything between the raw Ethernet interface and the PCI Express bus to the host CPU cores can be completely and dynamically reconfigured while packets are in flight.

Most SmartNICs or DPUs on the market are built around a single application-specific integrated circuit (ASIC), with the best examples being the NVIDIA Bluefield and Intel’s Mt. Evans. While these SmartNICs include programmable CPU cores to assist in packet processing, their architectures are fixed. As a result, their packet-processing pipelines are very well-defined, highly optimized, and cast in silicon. If composability is desired, then these approaches are too rigidly designed.