Electronic Design

14-Bit DACs Perform DDS For RF Signals To 3.6 GHz

The 14-bit AD9739 and AD9789 TxDAC digital-to-analog converters (DACs) from Analog Devices use the company’s Mix-Mode super-Nyquist architecture to perform high-fidelity direct digital synthesis (DDS) for RF signals to 3.6 GHz (see the figure). According to ADI, the combination of best-in-class bandwidth and dynamic range with a direct-to-RF core lets broadband and next-generation wireless-equipment designers use a single transmit-DAC architecture for multiple communications standards while eliminating an off-chip mixer and low-pass filter to reduce design complexity, cost, size, and power.

The AD9789 integrates a quadrature amplitude modulation (QAM) encoder, interpolator, and digital upconverter that achieve a 2.4-GHz sample rate for cable infrastructure. The 2.5-GHz AD9739 exploits the same DAC core and features the industry’s widest usable input bandwidth, ADI says. It also suits a broad range of applications, including wireless communications equipment, instrumentation, and defense electronics. Both devices provide multicarrier capability up to the Nyquist frequency in baseband mode and use the mix-mode function to generate RF signals in the second and third Nyquist zones. With this feature, designs can eliminate a mixing stage and reduce component count and design complexity in direct-RF applications.

Furthermore, the AD9789 shortens time-to-market for DOCSIS-III cable-infrastructure designs using low-cost FPGAs. The DAC’s flexible digital interface can accept up to four channels of complex data. The QAM encoder supports constellation sizes of 16, 32, 64, 128, and 256 with square-root raised cosine (SRRC) filter coefficients for all standards. The on-chip rate converter supports a wide range of baud rates with a fixed DAC clock. The digital upconverter can place the channels from 0 to 0.5 fDAC to synthesize up to four contiguous DOCSIS channels anywhere in the DOCSIS band.

The AD9789 also includes a serial peripheral interface (SPI) port for device configuration and status-register readback. The flexible digital interface accommodates data bus widths from 4 to 32 bits and can accept real or complex data. Configuration options can set the data path to bypass the QAM encoder and SRRC filter to enable the DAC to operate within a broader range of applications such as wireless infrastructure. The nominal DAC output current is 20 mA, which produces a peak 0 dBm into a 50-Ω load. The AD9789 operates from 1.5-, 1.8-, and 3.3-V supplies for a total power consumption of 1.7 W, which is half of the power dissipation of competing signal chains, according to ADI.

The AD9739 provides output signals to 3.6 GHz. The DAC’s dual-port low-voltage differential signaling (LVDS) interface supports the high sample rate with existing FPGA and ASIC signal-processing technology. An SPI port is included for configuration and status-register read back. The output current is programmable from 8.7 to 31.7 mA. The AD9739 operates from 1.8- and 3.3-V supplies for a total maximum power consumption of 1.1 W, which is 25% less than conventional transmit signal chains, ADI says.

The AD9739 comes in a 160-ball chip-scale ball-grid array (CSBGA) and costs $43.69 each in lots of 1000. The AD9789 comes in a 164-ball CSBGA and costs $53.10 each in lots of 1000. Both are now available in volume production.

Analog Devices


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