EE Product News

Chip Bridges PCI To Parallel Port

Designed for PCI-based parallel expansion add-in cards, the OX12PCI840 bridges the PCI bus to an IEEE1284 SPP/EPP/ECP parallel port. The chip features a parallel port that can be located at standard I/O addresses, making it well suited for legacy applications. The 32-bit, 33-MHz target-only PCI interface is compliant with version 2.2 of the PCI Bus Specification and version 1.0 of the PCI Power Management Specification. The chip is configured by system start-up software during the bootstrap process that follows bus reset. The system scans the bus and reads the vendor and device identification codes from any devices it finds and loads device driver software according to the information and configures the I/O, memory and interrupt resources. Device drivers can then access the functions as the assigned addresses with improved data throughput provided by PCI. The 5V device is housed in a 100-pin PQFP package and is priced at less than $5.00 each/10,000.


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