Communications Terminals Shrink Interfaces

Dec. 1, 1999
Backward compatible with the firm's Mini-ACE Plus for legacy applications, the Enhanced Mini-ACE chips are available with additional functionality, including RT only and BC/RT/MT versions with 4Kwords of internal RAM and 64Kword internal RAM with RAM

Backward compatible with the firm's Mini-ACE Plus for legacy applications, the Enhanced Mini-ACE chips are available with additional functionality, including RT only and BC/RT/MT versions with 4Kwords of internal RAM and 64Kword internal RAM with RAM parity checking. Enhanced Mini-ACE units are packaged in 1 in.2 ceramic flatpacks providing compatibility with the Mini-ACE. The devices come with 3.3V or 5V internal logic and 5V transceivers with options for MIL-STD-1553 bus, McAir, or MIL-STD-1760 compatibility. The Enhanced Mini-ACE's BC architecture includes an internal message sequence control processor, a general-purpose queue, and user-definable interrupts. The internal processor's 20-instruction set includes conditional operations based on results of messages or user-defined flags, along with jumps, subroutine calls, and timing control.

Company: DATA DEVICE CORP.

Product URL: Click here for more information

About the Author

Staff

Articles, galleries, and recent work by members of Electronic Design's editorial staff.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!