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Implement Idle-Bus Failsafe  In Multipoint Networks

Implement Idle-Bus Failsafe In Multipoint Networks

With the growing trend of novice engineers joining the industrial engineering community, questions regarding the functional principles of industrial networking are reaching an all-time high. Despite an abundance of literature available, one of the most frequently discussed subjects is the implementation of idle-bus failsafe in multipoint networks, such as RS-485.

Idle-bus failsafe is the provision of maintaining the output of an active bus receiver high during bus-idling, that is, when the bus is not actively driven because all driver outputs are high-impedance. Bus-idling can occur due to various reasons:

  • There is simply no data to transmit
  • A transmitting node loses connection to the bus
  • The handover of bus-access from one node to another

The handover is the most common cause of bus-idling, as it occurs during normal operation. To prevent bus contention, which could occur if multiple drivers were trying to gain bus access simultaneously, a driver must complete its transmission by disconnecting from the bus (going high-impedance) before another driver gains access. High-level protocol software controls this handover process. Depending on the application, it can take from a few microseconds up to several minutes.

By The Numbers

During idle-times and without a provision for idle-failsafe, a receiver output can assume one of the logic states, high or low, or can begin toggling due to differential input noise. This is due to the receiver being a differential comparator with a wide input threshold range, but only for a small hysteresis region.

In detail, the upper and lower input voltage thresholds are VIT+ = +200 mV and VIT- = –200 mV, while the typical input hysteresis is VHYS = 60 mV only. This means that the narrow hysteresis band can vary between receiver units and over temperature within a 400-mV range (Fig. 1).


Fig 1. For VAB

During data transmission, the bus signal of VAB = ±1.5 V exceeds the upper and lower input thresholds and transits quickly through the input threshold range. This forces the receiver output to follow quickly and ensures sharp and clean output transitions. During idle-times, however, when VAB approaches 0 V and resides in the middle of the input threshold range, the receiver output state depends on the actual position of the hysteresis region within that 400-mV range.

From Figure 1 it becomes clear that a receiver with a hysteresis band in the a-region outputs a low, if VAB drops from a positive level to zero. This is because it crosses the negative input threshold VIT- a. If the final transition occurs from a negative level to zero, output R remains low because the positive-going transition never crosses the voltage thresholds of the a-region.

For a receiver with a hysteresis band in the b-region, the output states assume opposite polarity. A final positive-going transition crossing the positive input threshold VIT+ b will turn R high, while a final negative-going transition, not crossing any input thresholds, maintains R high.

Failsafe Bias Design

Figure 2 shows a typical bus with its distributed network nodes. When all drivers are high-impedance, the low-impedance termination resistors, RT, establish the same voltage potential on both, A and B conductors, diminishing VAB.


Fig 2. Failsafe biasing must generate sufficient failsafe voltage to ensure reliable receiver output states during bus-idling.

To ensure a reliable receiver output state (preferably high) during bus-idling, VAB must be raised to a failsafe level, VAB-FS. This includes the positive input threshold, VIT+, and any potential differential noise voltage, VN, that might be superimposed on the A-B signal pair:

VAB–FS = VIT + VN (1)

This is accomplished by implementing two bias resistors, RB, one of which pulls the A-line up toward supply potential while the other pulls the B-line down toward ground potential. The bias resistors must be dimensioned so their voltage-divider action with the termination resistors generates the necessary VAB-FS at the minimum supply, VS min.


Fig 3. The lumped equivalent circuit is needed to simplify the calculation process.

For clarity, Figure 3 shows the lumped equivalent circuit of the data link. Here, “lumped” means that each conductor is seen as a large current node where:

  • The two parallel termination resistors, RT, are combined into one resistor RT/2
  • The distributed receiver input impedance, RIN, along each conductor is merged into one equivalent common-mode impedance, RINEQ
  • The ingoing node currents must equal the outgoing currents.

To establish an equation for RB as a function of VAB-FS, VS-MIN, RT, and RINEQ, we must determine the node-currents into A and B and then solve for the respective line voltages, VA and VB:

Establishing the difference between both line voltages yields the failsafe voltage, VAB-FS:

Because the failsafe resistors and the receiver input impedances present common-mode loading to the bus, their combined conductance must be equal to or less than 1/375 Ω, specified in EIA-485:

Inserting this constraint into Equation 4 and solving for RB provides the final equation for calculating the failsafe resistor values:

Because RT ideally matches the characteristic cable impedance, Z0, the second term of Equation 6 becomes a numeric constant. The two most commonly used bus cables in multipoint networks are RS-485 cable with Z0 = 120 Ω = RT and low-cost CAT-5 cable with Z0 = 100 Ω = RT. Inserting these values into Equation 6 yields the following two RB equations, one for a 120-Ω system and another for a 100 Ω system:

Failsafe bias resistors must be calculated for worst-case conditions. Assuming a 5-V node supply with ±5% tolerance, therefore, makes VS min = 4.75 V. For a well-balanced network we can further assume the differential noise to be less than 50 mV, requiring a failsafe voltage according to Equation 1 of:

VAB–FS = VIT+ + VN = 200 mV + 50 mV = 250 mV (9)

Then for a 120-Ω system, the required bias resistor value becomes:

From the E-192 series, choose the next lower value with 523 Ω to ensure VAB-FS remains above 250 mV.

Impact On Common-Mode Loading

As shown in Equation 5, the failsafe biasing resistors present a common-mode load in addition to the receiver input impedances. To ensure this loading does not fall below the specified minimum of 375 Ω, check the remaining receiver unit loads by solving Equation 5 for RINEQ:

For RB = 523 Ω, the equivalent receiver input impedance yields RINEQ = 1325 Ω, which translates to a unit-load number, nUL, of:

This means that a total number of 9 x 1UL, 18 x ½ UL, 36 x ¼ UL, or 72 x 1/8 UL transceivers can be connected to the bus.

Integrated Idle-Bus Failsafe

Modern transceivers can eliminate the common-mode load effects of failsafe biasing by providing idle-failsafe capability internally. Their designs have the upper input threshold reduced to levels below 0 V, allowing for some differential noise to reside on top of VIT+.


Fig 4. A comparison between idle-failsafe methods reveals how true failsafe transceivers require VIT+ = –50 mV.

Figure 4 compares the failsafe performance of an external solution using biasing resistors with the performance of two transceiver types featuring integrated idle-failsafe. The grey-shaded areas present the maximum and minimum positions of the typical hysteresis region or width within the input-threshold range.

Device A represents a standard transceiver using external failsafe biasing. Without biasing the noise signal swings around the 0-V idle-level. External biasing, however, creates an offset that lifts the failsafe threshold to 250 mV.

One argument I’m frequently confronted with is that the specified hysteresis is a typical value and the actual value might be larger, not requiring external bias resistors. But this argument is easily challenged by pointing out that because it’s a typical value, the actual hysteresis could be significantly smaller.

As proven here, idle-bus failsafe design must be based on worst-case conditions and cannot rely on vague assumptions of what value the actual hysteresis might be—not for standard transceivers with larger typical values, and most certainly not for failsafe transceivers with much smaller hysteresis.

Device B is an idle-bus failsafe transceiver with an upper input threshold of –10 mV. Without external bias resistors the noise voltage must be smaller than 20 mV p-p, while larger noise crosses the small hysteresis region causing receiver output toggling. To make this device work in a noisy environment, external biasing is still necessary to lift the failsafe threshold to 40 mV.

Device C is a transceiver with true idle-bus failsafe capability. Because of its VIT+ = –50 mV, it can tolerate up to 100-mV p-p noise without external bias resistors. Because of its low VIT+, the width of the hysteresis region and its position within the input threshold range do not matter.


Idle-bus failsafe is a necessary function to prevent receiver toggling during bus idling. External bias resistors allow for user configuration but cause high common-mode loading. Transceivers with integrated idle-failsafe capability can replace external biasing if, and only if, their upper receiver input threshold is low enough to tolerate input noise residing on top of VIT+.


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