EE Product News

Interface Chip Lowers Costs In DSLAM Applications

By providing a power performance equivalent to Class G using only two power supplies, the PBM 39705/3 single-chip, analog receive/transmit interface circuit promises to minimize both the complexity and expense of DSLAM designs. The chip uses a digital series bus interface to set gain (in 1-dB steps), impedances and power nodes.Manufactured using a CMOS process, features include integrated echo cancellation (>20 dB), bit rates of 8 Mb/s downstream and 800 kb/s upstream, and a typical power dissipation of 0.9W during G.dmt CO-operation with a 100½ load. Dissipation is 0.2W in power-down mode and 0.5W for G.lite or when a PAR-value is used. Available in a 32-pin LQFP, operational temperature range is from 0ûC to 85ûC. For more details and pricing, call ERICSSON MICROELECTRONICS, Kista, Sweden. +46 8 757 4700.


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