SERDES Chip Improves Signal Integrity, Provides For Real-Time Waveform Viewing

Sept. 11, 2008
The VSC3441 high-speed serializer/deserializer (SERDES) from Vitesse Semiconductor incorporates clock and data recovery (CDR) circuits and advanced equalization to compensate for various impairments and losses encountered in copper cables and backplane

The VSC3441 high-speed serializer/deserializer (SERDES) from Vitesse Semiconductor incorporates clock and data recovery (CDR) circuits and advanced equalization to compensate for various impairments and losses encountered in copper cables and backplane traces and connectors. It also includes Vitesse’s VScope waveform viewing technology, making it possible to see the received signal as it really exists.

The company crafted the chip in response to the need for higher-speed serial links to accommodate more bandwidth in backplanes, interconnects, and cable links found throughout network and telecommunications equipment. With it, designers can serialize data to higher rates for simplified transmission through legacy backplanes or cable interconnects. This is achieved by compensating for the signal-path degradation via equalization that improves the signal-integrity performance of the transmission.

Applications include Gigabit Ethernet, XAUI, 2x XAUI, Fibre Channel, Serial Attached SCSI (SAS), Serial ATA (SATA), Rapid IO, InfiniBand, and PCI Express (PCIe). The device can operate as a single 20:1 SERDES with redundant I/O, a dual 10:1 SERDES with redundant I/O, and a quad 10:1 serializer or a quad 1:10 deserializer. It also can operate at clock rates from 125 Mbits/s to 6.375 Gbits/s, allowing the multi-protocol support. The CDR removes random jitter from the optical fiber links (see the figure).

Vitesse introduced the amazing VScope function in its VSC3406 6.375-Gbit/s backplane transceiver earlier this year. It effectively embeds an oscilloscope into the device at the output of the equalizer, so designers can perform real-time diagnostics and remote monitoring functions. The signal is sampled at that point by a unique analog-to-digital conversion (ADC) technique that creates a waveform that represents the real state of the signal at the sampling point. That signal is then read out over a USB port.

This post-equalizer scanning delivers an unobstructed view of the internal IC signal compared to oscilloscopes that offer only an extrapolated view of signals from outside the chip. The patented technique is one step toward a real embedded instrumentation movement in higher-speed equipment.

The VSC3441 comes in a 15- by 15-mm, 196-pin, flip-chip ball-grid array (FCBGA). The volume price is $32, and production quantities will be available in the fourth quarter. Louis E. Frenzel

Vitesse Semiconductor Corp. www.vitesse.com

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