EE Product News

Clock Oscillator Raises Frequency & Reduces Jitter

The combination of two technological advances allows the Model M2944 clock oscillator to reduce jitter to 20 ps while raising frequency to 410 MHz. The device is based on ultra-fast ECLPS logic for low jitter, and an inverted mesa crystal for very high frequency. It maintains 45/55 waveform symmetry and features 225-ps waveform rise and fall times. Frequency stability is better than 20 ppm from 0°C through 70°C, including supply, load and aging variations.The devices operate at 5V at ±5% and draw 45 mA at 5V. They are compatible with ECLPS logic families and all versions incorporate a 0.1-µF bypass capacitor to minimize the effect of supply voltage transients.The oscillators provide low jitter reference frequencies for advanced digital and data communications systems. The combination of low jitter at high frequency provides reference signals that can be multiplied to the gigahertz levels of ATM, SONET and other advanced communications systems.


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