Electronic Design

Nano's Success Depends On A Rock Solid Foundation

Building a strong infrastructure and using selected silicon methods helps bridge the gap to the mass manufacture of nano devices.

Nanotechnology is at a nexus in its evolution: It needs a viable infrastructure to support the high-rate manufacture of nano-scale devices, particularly devices grown atom by atom and molecule by molecule, as envisioned by the technology's original proponents.

Advances rage on in organic nano materials--particularly carbon nanotubes (CNTs), the most commonly used material. The challenges remain, too. The number one plan on the list is to develop practical methods of making devices out of these materials. Moving from the "lab to the fab" is essential.

Meanwhile, funding continues unabated as the scientific, engineering, business, and governmental communities look forward to its realization. The U.S. government's 2005 $1 billion budget for this year's nanotechnology research is double that of 2001's budget.

This year, the National Science Foundation (NSF) awarded $69 million over five years to six major academic nanotechnology centers in nanoscale engineering and science: Northeastern University ($12.4 million), Stanford University ($7.5 million), the University of California at Berkeley ($11.9 million), the University of Pennsylvania ($11.4 million), the University of Wisconsin in Madison ($13.4 million), and Ohio State University ($12.9 million).

These universities will work with industry, government laboratories, and other universities to develop test beds of high-rate-manufacturing nanotechnology processes. They will use reliability, defect, and other modeling programs, all the while considering the societal and ethical issues pertaining to nanotechnology.

The recently inaugurated Center for High-Rate Nanomanufacturing at Northeastern University is one of today's most modern facilities. It features the latest and some of the most sophisticated equipment and capabilities needed to study nanomanufacturing concepts (Fig. 1).

Silicon designs, with their top-down-based approach, are shrinking thanks to advances in lithography. They're also rapidly approaching the realm of nanotechnology, generally defined as any structure with dimensions of 100 nm or less. In fact, silicon design engineers proudly call their designs nanoscale because they're made with lithographies that define 65-nm and even 40-nm geometries, well within the universally accepted definition of a nano device.

Some argue, however, that silicon-process technologies like CMOS will soon hit fundamental material physical limits. But that verdict is still up in the air as lithography continues to march forward--albeit more expensively.

One glaring challenge with conventional CMOS processing is thermal scaling. How do designers cost-effectively remove the heat generated by ever faster yet smaller devices? Given the challenges faced by silicon IC designs and the advantages of building structures from the bottom up using high-performance organic materials, proponents of the top-down and bottom-up approaches are coming to a meeting of minds.

More than ever, silicon IC designers realize their need to understand a material's chemical, biological, and quantum properties as line geometries shrink further. When using organic materials like CNTs, researchers have found that learning more about conventional CMOS technologies is crucial in creating the right infrastructure for practical manufacture of "bottom-up" nanoscale devices.

Other nanotechnology experts now push approaches like nano-imprint lithography (NIL) to break through photolithography's limitations. Jenoptik Mikrotechnik GmbH believes that micromolding technologies, such as NIL and hot embossing, are the most developed and most industrially compatible of all known polymer micro and nano patterning technologies (see "Nano-Imprint Lithography To The Rescue" at www.elecdesign.com, ED Online 10816).

Some form of a hybrid approach will emerge. It will combine the best benefits of the knowledge gleaned from studying silicon processing and the superior electrical properties of organic materials like CNTs and fullerene nano materials.

A research team at Philips and the Kavli Institute of Nanoscience in Delfts, the Netherlands, has used the bottom-up approach to grow III-V compound semiconductor nanowires on germanium and silicon substrates. Previously, this wasn't possible with conventional top-down approaches.

Many other teams have grown silicon structures with CNT wires acting as interconnects for memory, logic, and switch functions. For instance, Nantero has produced nanotube memory devices (Fig. 2). Additionally, STMicroelectronics dove into developing molecular memory devices. FETs, high-Q oscillators, and crossbar switch junction arrays are other devices made using CNTs.

In another vein, Nantero is developing a commercial nonvolatile memory for BAE Systems using a BAE Systems' radiation-hardened CMOS process. Furthermore, Triton Systems has come up with a nano imaging chip.

Springs, gears, motors, and other interesting structures have been built using CNTs thanks to their versatility. CNTs figure to land in systems like fuel cells, capacitors, and oscillators. They're a major element in providing structural improvements for composites, fabrics, sprays, powders, and other materials. They also play a key role in drug delivery and DNA analysis. Some experts call CNTs the "silicon" of the future.

Using conventional materials-processing techniques, Ning Pan of the University of California, Davis, developed CNT-based thin-film capacitors with a power density of 30 kW/kg. That's a tenfold increase over previous devices. The U.S. Missile Defense Agency and consulting firm Mytitek Inc. are co-sponsoring his work. It is expected to yield supercapacitors with scan rates of 1000 mV/s, ultimately replacing conventional batteries in handheld electronic devices.

CNTs are far more superior for interconnect purposes than copper or aluminum wires. They feature much higher hole mobilities and smaller diameters (as small as 0.4 nm). They also can carry an order-of-magnitude more current per square centimeter.

But CNTs are notoriously difficult to grow and control for precise spatial locations, and they're difficult to process. To take advantage of their higher current-carrying capabilities, researchers must use bundles or meshes of CNT wires (sometimes thousands of wires), which creates problems in maintaining consistency in a CNT's electrical properties.

Depending on whether or not the mesh or bundle is twisted and how much it's twisted determines the CNT's chiralty (i.e., whether or not it is conducting, semiconducting, or in some state in between). Glen P. Miller of the University of New Hampshire suggests the use of fullerenes, the most abundant of which is C60. Fullerenes can be more easily manipulated than CNTs for some suitable applications (see "Manufacturing With Fullerenes And Nanotubes: A Little Chemistry" at www.elecdesign.com, ED Online 10817).

The CNT's superiority over copper and aluminum has led silicon design engineers to build hybrid silicon structures with CNT interconnects. Various methods are being investigated to better control the accuracy of laying down CNT interconnects. One method patterns metal lines on a silicon substrate, pours a polymer on the substrate, and then removes the combined metal/polymer structure.

Thomas Beebe at the University of Delaware uses the tip of a scanning tunneling microscope (STM). Energy from the STM's tip initiates a chemical reaction on top of a "corral" barrier that stops the carbon nano wire's growth at the "corral's" edge. This suggests that future self-assembling nano wires could be made to grow by stimulating them electrically and then stopping the stimulation to halt the growth.

Other researchers have tried to get a better handle on the ability to precisely position and control organic nano wires like CNTs. At Purdue University, researchers have used self-assembling DNA to create nano wires.

In general, shorter-length CNTs exhibit better electrical properties than longer ones. But Peter Burke at the University of California at Irvine has successfully demonstrated CNTs with excellent electrical properties that measure 10 times longer than what was previously possible. Burke created the CNTs by using natural gas, which reacts chemically with iron nano particles, placed inside a furnace. He then adds a small amount of gold under the iron nano particles inside the furnace.

There's more to silicon than meets the eye, with silicon nano wires receiving considerable attention these days. Scientists at the National Institute of Standards and Technology (NIST) developed a silicon nano wire design that they believe is the first to demonstrate a Schottky barrier-type contact using a top-down approach (Fig. 3). The device's 60-nm wide channels exhibit much greater difference in current between on and off states than a device with 5-mm wide channels.

The roadmap toward high-volume nano manufacturing is irreversible. But it will take some time to reach full maturity. We've gone from the manipulation of a few atoms and single-wall (SW) CNTs in the 1980s, to atomic-force-microscopic manipulation of SW CNTs during the 1990s, to the development of molecular logic gates over the last few years.

According to Ahmed Busnaina, director of Northeastern University's Center for High-rate Nanomanufacturing, future plans are to manipulate billions of atoms and CNTs using self-guided templates that will lead nano manufacturing to high throughput levels and reliable devices (Fig. 4).

Busnaina says that today's state-of-the-art semiconductor fabrication processes allow a single lithographic mask to make more than 100,000 wafers. The challenge for nanolithography will be to create 3D self-guided nano templates that also can be used as many times or more in the same manner (Fig. 5).

Nanotechnology may very well manifest itself in new ways of performing electronic functions by using quantum dot technology. Wolfgang Porod, a nanotechnology expert at Notre Dame University, points to the Quantum Dot Cellular Automata concept developed at Purdue. It encodes information by the arrangement of electrons, not by the flow of electrons. Also known as nano dots, quantum dots are being developed to replace chemical dyes. Red, blue, or yellow dyes can be obtained by adjusting the quantum dot's diameter.

Nano lithography will take another step into molecular electronic devices. Benjamin Ocko at Brookhaven National Laboratory has shown that it's possible to grow ordered structures of ultra-thin molecules of organic chain molecules on the surface of liquid mercury. In addition, researchers at NIST recently devised a method to measure single-atom molecular chains of wires, an important step toward the design of molecular circuits.

We also can expect single-electronic devices as well as spintronic devices. Though they've been verified to operate at low temperatures, they theoretically could be made to operate at room temperatures.

We're closing in on the nanotechnology explosion, but there are still roads to travel. Safety, regulatory, ethical, and intellectual-property issues are all under investigation. The debate on nanotechnology's societal impact also is under way among study groups that are funded by the government, industry, and academia.

BAE Systems

Brookhaven National Laboratory

EV Group


Jenoptik Mikrotechnik GmbH

Kavli Institute of Nanoscience

KIMM (Korea Institute of Machinery and Materials)

Molecular Imprints


Nantero Inc.

National Institute of Standards and Technology (NIST)

National Science Foundation (NSF)

Northeastern University


Ohio State University

Purdue University

Princeton University

Stanford University


Suss MicroTec

Triton Systems

University of Delaware www.udel.edu

University of California, Berkeley

University of California, Davis

University of California, Irvine

University of New Hampshire

University of Pennsylvania

University of Wisconsin, Madison

U.S. Missile Defense Agency

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