Using a new wafer-thinning technology that permits wafers as thin as 30 microns, Samsung Electronics Ltd. has developed a 16-chip multichip package (MCP) for memories. By comparison, a 10-chip device introduced by the company just last year used a wafer 45 microns thick. When applied to 8-Gbit NAND flash chips, the new MCP can enable a 16-Gbyte device.
Also required to create the 16-chip MCP was a new laser-cutting technique to cut the wafer into individual chips. This improved technology prevents the chips from breaking as they are prone to do when cut by the conventional blade sawing method, which was designed for wafers down to 80 microns thick. To permit vertical stacking of identically sized chips, the new MCP uses a redistribution layer technology that allows fabricators to adhere to the wire contacts from just one side. Conventional techniques make connections from both sides of each chip. Also, zigzaging the die so that the wire contacts alternate sides further reduces the total height needed for the wire connections. Even the thickness of the adhesive was reduced to 20 microns. The result is a 16-die stack only 1.4 mm high, compared to 1.6 mm for the 10-chip MCP.