Resources
Directory
Webinars
CAD Models
Video
Blogs
Advertise
Search
Search
Top Stories
TechXchange
Analog
Power
Embedded
Test
AI / ML
Markets
Data Sheets
Podcast
Home
>
Technologies
>
Embedded
Digital ICs
FPGA
Memory
Processors
Recent
ID 5549870 © Artistar | Dreamstime.com
Memory
What’s the Difference Between JESD230G and Earlier JEDEC Standards?
ID 84308884 © Andy Chisholm - Dreamstime.com
Now and Then
Now and Then: Magnetic Cores
ID 88963268 © Jurij Boiko | Dreamstime.com
Memory
A Low-Overhead, High-Security NOR Flash Solution
ID 23655199 © Pere Sanz | Dreamstime.com
Memory
1.2-V VIO SPI NOR Flash Reduces Overall System Cost and Power
Dreamstime_Iuliia-Chernyshenko_156096018
Embedded
Between the Lines: The Next Frontier in 3D NAND Flash
Microchip
Boards
Storage Accelerator Speeds Up NVMe Arrays
Solidigm
Memory
Cold-Plate SSD Targets Liquid-Cooled Servers
Future of Memory and Storage
Memory
Future of Storage and Memory Conference 2025
Check out the latest technology presented at this year's FMS conference.
ID 107744852 © Ekkasit919 | Dreamstime.com
Memory
UFS 4.1 Chip Handles Automotive Storage Chores
Kioxia’s latest UFS 4.1 memory chip, which more than doubles the speed of previous versions, meets automotive requirements.
ID 22376187 © Camij | Dreamstime.com
Memory
Data Storage Advances Lead to More Sustainable Data Center Infrastructure
This article highlights the importance of data storage and how hard drives are the key to creating a more sustainable future.
Renesas
Processors
MRAM Micro Sports AI Accelerator
Renesas’ dual-core RA8P1 employs MRAM instead of flash memory, plus it incorporates an Arm AI accelerator.
76795646 © Cybrain | Dreamstime.com
TechXchange
SmartNIC Accelerating the Smart Data Center
Network interface cards are much smarter than they used to be.
Recommended
Dreamstime_Wavebreakmedia-Ltd_57340648
CXL Standards and Architecture
This TechXchange examines the Compute Express Link (CXL) architecture and standards.
AMD
Machine Learning
AMD Announces Next-Gen GPUs and Software for AI
Arm
Embedded
Arm Compute Subsystem Aims to Speed Up Automotive AI Chip Design
Machine Learning
Mixing Analog and Digital Spiking Neural Networks for Low-Power Sensors
Dreamstime_yuliagapeenko_329483522
Microcontrollers
Real-Time MCU First to Integrate NPU
ID 321540663 © Mauriceyom98 | Dreamstime.com
FPGA
FPGA Platform Delivers Lower Power and 16G SerDes
Lattice's Nexus 2 family offers up to 3X lower power in smaller packaging, offering advanced connectivity features such as 16G SerDes and high-performance I/O.
75868080 © Vladimir Timofeev | Dreamstime.com
Wired
3-nm Optical DSP Meets AI's Need for Speed in Data Centers
By upgrading to the 3-nm process, Marvell is positioning the new Ara DSP to be a key building block of 1.6-Tb/s optical modules in the data center.
316140327 © Andreyi Armiagov | Dreamstime.com
EDA
Arteris Bridges Hardware-Software Gap with New EDA Tool
Magillem Registers is all about speeding up the design of hardware-software interfaces in complex, large-scale SoCs.
ID 340558606 - Ai © Yulia Gapeenko - Dreamstime.com
Processors
SIP Module Supports Time-Sensitive Networking
Octavo Systems' OSD62x-PM incorporates a Texas Instruments AM62x SoC.
Load More Content