Dual Differential 2:1 Clock/Data Multiplexer Minimises Jitter

Dual Differential 2:1 Clock/Data Multiplexer Minimises Jitter

ON Semiconductor’s latest clock distribution IC offers pin-to-pin compatibility with existing products on the market—but with enhanced jitter performance. This allows for a wider eye opening to improve system reliability, says the company. The NB6L56 handles clocks speeds of up to 2.5GHz and up to 2.5Gbps data streams with very low power consumption. It operates from a supply voltage of 2.5 or 3.3V. The 2:1 clock/data multiplexer’s differential inputs incorporate internal 50Ω termination resistors accessed through the VT pin. As a result, the device can accept a broad variety of logic level standards. Outputs are 800mV emitter-coupled-logic (ECL) signals. The NB6L56 comes in a low-profile, 5mm-by-5-mm, 32-pin QFN package.


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