Electronic Design

Electronic Design UPDATE: June 18, 2003


Electronic Design UPDATE e-Newsletter Electronic Design Magazine - http://www.planetee.com June 18, 2003


*************************ADVERTISEMENT************************** Design with Flash-based FPGAs and Reduce Total System Cost Learn the latest about Flash FPGAs and how it can provide you with a competitive advantage over ASICs and SRAM FPGAs. Flash-based FPGAs are reprogrammable, nonvolatile and live at power up. To view a Flash webcast presentation go to: http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAtz0Ay **************************************************************** CHECK IT OUT: Visit our recently redesigned Web site, www.elecdesign.com, where the power of Electronic Design is a mouse click away! Read our Web exclusives, discover Featured Vendors, access our archives, share viewpoints in our Forums, explore our e-newsletters, and more. ...AND TAKE OUR CURRENT QUICK POLL Bob Pease would like to know: When listening to music or even your computer's fan or a dial tone, as you bite down hard on some tough nuts or a popcorn cake, the pitch seems to dip momentarily by about half a note. Bob hears this plainly. Do you? Go to http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ05Am0Ac Today's Table of Contents: 1. Editor's View DAC From The Inside 2. News From The Editors * SIA Sees 16.8% Growth For 2004 Global Semi Sales * ZigBee First Silicon Unveiled * SVP System Leverages Hierarchical Database * Image Processor Suits Cost-Sensitive Apps * Cell Library Boosts Density, Drops Power Consumption 3. Upcoming Industry Events in June and July * Third Conference on Microelectronics and Packaging * DesignCon East * International Conference on MEMS, Nano, and Smart Systems 4. Magazine Highlights June 9, 2003 issue * Cover Story: Technology Report -- Full Steam Ahead For The WLAN Juggernaut * Leapfrog: First Look -- Graphics ICs Advance To Near-Cinematic Levels For The Computer * Embedded In Electronic Design: Little Linux * Design View: Put The Whammy On RF Noise, EMI Without Hurting Performance June 16, 2003 Special Issue The State Of The Industry Edited by John Novellino ********************** 1. Editor's View -- Exclusive to Electronic Design UPDATE ********************** DAC From The Inside By David Maliniak, Electronic Design Automation Editor For this EDA editor, the Design Automation Conference (DAC) is a love-hate kind of thing. I love it because the entire EDA industry is gathered under one roof, albeit a humongous one. But I hate it, mostly because of the humongosity (is that a word?) of that same roof. I suppose I could learn to roller-skate, which would alleviate having to hike from one end of a huge convention center to the other in three minutes or less to make the next meeting. But the fact remains that DAC is an opportunity to get all of EDA's movers and shakers in one place at the same time. Now that I've survived another one, allow me to offer some random impressions. Total attendance this year was a little over 10,000. That's slightly higher than last year's but nowhere near the attendance of the late-90s DACs. At least there wasn't any need to elbow my way through the aisles on those long hikes. Still, many of the panels and technical sessions were well attended. The good news is that unlike last year, there were actually more conference attendees than exhibitor personnel. What does an EDA editor do at DAC? I suppose some of us approach it a little differently than others. I, for one, enjoy the meetings with vendors and the updates on their newest tools and methodologies. It's good to escape once in a while into a particularly interesting panel session or technical presentation. But the best part is the chance to sit with some of the brightest minds in EDA to gain insight into future directions. One such session at this year's show was spent with Cadence CTO Ted Vucurevich. I had a wonderful, free-wheeling hour with Ted in which he gave me a tour of the challenges facing the EDA industry in coming years. A key point: The 180-nm process node brought harbingers of the signal-integrity issues that now dominate at 130 nm. Similarly, the 90-nm node, Vucurevich asserted, will presage the manufacturing issues that will dominate at the 65-nm node. Vendor meetings are great, and among the most interesting are those with the flock of startups that always seems to appear at each DAC. One of the more impressive ones this year, I felt, was Critical Blue. The company's debut product, the Cascade tool suite, is a coprocessor synthesis tool that examines a system processor's workload, partitions it, and generates synthesizable RTL for a custom coprocessor to accelerate tasks run in software. See more at Critical Blue ==> http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAt10Al Lastly, DAC wouldn't be DAC without the parties, dinners, and other off-site happenings every year. I'll admit it right upfront: I'm just not the party animal I once was, I'm afraid. But I did enjoy a trip to Disneyland with the Verplex crew, even if I was mistaken for a customer. Synplicity's dessert party is always fun, despite the cool evening temperatures poolside at the Anaheim Marriott. And most editors stick around Wednesday night to wrap up DAC with the annual Synopsys dinner. You had to be there this year for CEO Aart De Geus's hilarious fantasy account of Synopsys outbidding Cadence for Disneyland. At least I think it was a fantasy... Contact David Maliniak at: [email protected] ********************** 2. News -- From The Editors ********************** ***SIA Sees 16.8% Growth For 2004 Global Semi Sales In its 2003-2006 midyear forecast, the Semiconductor Industry Association (SIA) sees 16.8% growth for 2004 and a compound annual growth rate (CAGR) of 9.8% over the forecast period. Annually, worldwide sales of semiconductors are expected to increase 10.1% in 2003, 5.8% in 2005, and 7.0% in 2006. Industry sales will grow from $141 billion in 2002 to $205 billion in 2006. In 2004, the growth will be led by a strong increase in memory, including a 43% jump in DRAM and a 25% increase in flash, supported by double-digit growth in other product sectors. The broad-based recovery will span computer, consumer, and communications applications. The forecast contemplates a return to higher IT spending levels and the emergence of multifunction products such as smart phones. Semiconductor Industry Association ==> http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ07EI0A7 ***ZigBee First Silicon Unveiled The first hardware and software samples of a ZigBee personal area network (PAN) solution have been delivered, with engineering samples scheduled for release in November. Motorola's Semiconductor Products Sector turned over the samples to several development partners. ZigBee (IEEE 811.15.4) can be thought of as a simpler, less expensive, lower-power version of Bluetooth. The goal is to bring inexpensive wireless connectivity to enterprise and consumer products. Maximum data rates are 20 to 40 kbits/s in the 868-MHz and 902- to 928-MHz bands and 250 kbits/s in the 2.4-GHz band. Typical range is 10 to 30 m, depending on the environment, but a maximum range of 75 m is possible at the lower frequencies and data rates. Up to 255 devices can be networked in an ad hoc peer-to-peer arrangement. Motorola's first chips implement the standard's full physical layer and media-access control in the 2.4-GHz band. Motorola ==> http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAt20Am ***SVP System Leverages Hierarchical Database In Monterey Design's Calypso silicon virtual prototyping (SVP) system, design planning, physical synthesis, and physical prototyping are all built atop a hierarchical database, enabling users to make more informed decisions on IC designs early in the cycle. For example, it's possible to quickly optimize the timing of a path that spans multiple blocks without having to go into each individual block to optimize each subpath contained within the global path. The tool also enables instantaneous incremental analysis. If a power rail is widened at chip level, for instance, Calypso can instantly and incrementally measure the effect on IR drop inside all of the blocks. Shipping in September for Unix and Linux workstations, the tool starts at $225,000 per year. Monterey Design ==> http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0paG0AV ***Image Processor Suits Cost-Sensitive Apps A single-chip solution for most entry-level printing appliances, the OTI-4100 from Oak Technology Inc. is a low-cost alternative to the company's OTI-4110 image processor. Both devices are based on Oak's Quatro imaging DSP platform, which includes a single-instruction/multiple-data DSP core for high-speed image processing. Along with a four-processor DSP core with a 4-kbyte instruction cache and 16 kbytes of SRAM, the OTI-4100 includes an ARM7 RISC CPU core with 2-kbyte instruction and data caches. Other features include a 2-MHz, 8-bit analog-to-digital converter and a 480-Mbit/s USB 2.0 interface as well as a full-speed USB host controller, a memory-card interface that supports multiple memory card formats, a scanner interface, an SDRAM interface, and additional I/O support. It all fits in a 216-lead LQFP. Samples of the OTI-4100 are available immediately. Oak Technology ==> http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAt30An or call (781) 638-7500. ***Cell Library Boosts Density, Drops Power Consumption An ultra-high-density (UHD) standard-cell library jointly developed by Virage Logic and Kawasaki Microelectronics of Tokyo delivers a 30% improvement in logic block area usage while typically consuming up to 20% less power compared to conventional standard-cell architectures. The cell library can be licensed directly from Virage or be used as part of the design tools from Taiwan Semiconductor Manufacturing Corp. (TSMC) in the foundry's 0.13-micron process. The libarary contains over 85 functions and over 440 cells that are optimized for synthesis, physical synthesis, and place-and-route software. Nominal gate delays are less than 20 ps, and power consumption is 0.67 nW/MHz per gate when implemented on a 1.2-V process. Raw gate density is approximately 227,000 gates per square millimeter, while the estimated routed density is about 193,000 gates/square millimeter. Virage Logic ==> http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ07cx0AP or call (510) 360-8000. ********************** 3. Upcoming Industry Events ********************** June 18, Third Conference on Microelectronics and Packaging, Herzelia on the Sea, Israel http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAe80Ad or contact conference office at [email protected] June 23-25, DesignCon East, Marlborough, Mass. http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ08el0AG July 20-23, International Conference on MEMS, Nano, and Smart Systems, Banff, Alberta, Canada http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAt40Ao ********************** 4. Magazine Highlights ********************** In case you missed them, here are some of the high points from our most recent issues. June 9, 2003: * Cover Story: Technology Report -- Full Steam Ahead For The WLAN Juggernaut Advances made with the 802.11 standard keep the wireless LAN field on pace for record growth, with new products arriving at a furious speed. * Leapfrog: First Look -- Graphics ICs Advance To Near-Cinematic Levels For The Computer Upgrades in their architectures along with the integration of large buffer memories enable the new breed of graphics ICs to deliver supercomputer-like graphics performance on a single chip. * Embedded in Electronic Design: Little Linux * Design View -- Put The Whammy On RF Noise, EMI Without Hurting Performance Learn methods and tips on how to suppress electromagnetic interference in your design and still maintain high performance levels. For the complete Table of Contents, go to http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAt50Ap June 16, 2003 Special Issue: * Electronic Design's first State Of The Industry special issue takes the pulse of the entire electronics industry, sector by sector. Our coverage includes State of the Industries, State of the Art Applications, and State of the Engineering Issues. For the complete Table of Contents, go to http://lists.planetee.com/cgi-bin3/DM/y/eRPF0DJhUf0EmQ0BAt60Aq




Editorial: Lucinda Mattera, Associate Chief Editor: mailto:[email protected] Advertising/Sponsorship Opportunities: Bill Baumann, Associate Publisher: mailto:[email protected]


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