Magnetoresistive RAM And Rad-Hard MCU Go To The Extreme

Oct. 13, 2005
This outer-space-capable RAM/MCU combo handles radiation levels of the highest degree.

Control applications in space-based systems ranging from low-earth orbit to deep-space exploration need microcontrollers that can withstand extreme levels of radiation and temperature. To meet those requirements, Silicon Laude leveraged Actel's RTAX-S series of radiation-tolerant FPGAs.

Also, Silicon Laude implemented a radiation-hardened and radiation-tolerant version of the MCS8051 microcontroller in the UT6325 rad-hard FPGAs from Aeroflex. Adding a nonvolatile 64-kword by 16-bit rad-hard magnetoresistive memory from Honeywell Corp. creates a microcontroller subsystem in a single package that can handle up to a 300-krad (Si) total ionizing dose of radiation (see the figure).

The rad-tolerant SL80RT051-AX001 uses the Actel FPGA, while the rad-hard SL80RH051-AF001 uses the Aeroflex FPGAs. The microcontrollers include 256 bytes of triple-module-redundancy (TMR) internal RAM, 1536 bytes of on-chip TMR extended data RAM, and memory soft-error detection and correction capability.

Their quad pulse-width-modulator modules can operate in stochastic digital-to-analog converter (DAC) output mode. The stochastic mode can prove invaluable in applications that need to generate one or more precision voltages without having to incorporate a separate rad-hard DAC.

The microcontrollers include Silicon Laude's proprietary hardware monitor and data exchange (HMDX) technology for real-time monitoring and debugging via an IEEE 1149.1-compatible (JTAG) test port. The HMDX technology also can be used to download programs into the MRAM and examine or edit data memory contents.

The company redesigned the basic 8051 interface to include a 16-bit synchronous/asynchronous port. The mode is selectable via an external mode pin that can switch between 8- and 16-bit modes. Consequently, the interface provides direct compatibility with Honeywell's synchronous 16-bit wide MRAM as well as with traditional EEPROMs and SRAMs.

A write-protection security lock prevents unintended writes to program memory. Deactivation of the lock is possible via a unique three-byte code. Additional hardware resources include seven interrupt sources, a 16-bit watchdog timer, a dedicated baud-rate generator, and a universal serial port equivalent to the port integrated on 8051-type MCUs (capable of both 8- or 9-bit asynchronous communications).

Like the 8051 MCUs, the SL80RX051 includes four 8-bit bidirectional parallel I/O ports with open-drain outputs. Yet unlike most other 8051s, the processor also has four 8-bit totem-pole output-enable registers that can be used to configure individual bits in each port for totem-pole output mode.

The FPGA-hosted versions of the 8051 are 100% instruction-compatible with the original MCS8051. They're fully supported by the Keil Software 8051 C compiler, the µVision 2 integrated development environment, and the Domain Technologies BoxView real-time high-level language debugger and USB-JTAG debug pod. With the BoxView tool, developers can open a data window into the device and monitor its contents and/or data exchanged in real time.

The rad-tolerant and rad-hard versions both come in 208-lead ceramic quad-sided flat packages. The AX001 requires 1.5- and 3.3-V core and I/O supplies, respectively, while the AF001 uses 2.5- and 3.3-V supplies. The AX001 can operate at a maximum clock rate of 28 MHz. It consumes about 280 mW and delivers a throughput of about 7 MIPS. The AF001 operates at up to 16 MHz, consumes about 350 mW, and delivers a throughput of about 4 MIPS.

Commercial-grade emulator versions of both devices cost $3000 each in single-unit quantities. B-flow versions of the AX001 and QML-Q versions of the AF001 cost $8950 and $8000 each, respectively, in 100-unit quantities.

Silicon Laude
www.siliconlaude.com

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