Electronic Design

Noise-Cancellation Scheme Boosts Backplane Data Rates

A scheme to cancel noise in gigabit-speed backplanes enables designers to keep the hardware infrastructure. All that's required is an upgrade to some of the circuits on the cards that plug into the backplanes.

Similar in principle to the technology used in noise-cancelling headphones, the high-speed noise-cancellation approach developed by Quellan Inc. can reduce the bit-error rate by a factor of 1 million. An existing noise-impaired equalized backplane that might typically have a bit-error rate (BER) of 1 × 10−6 can then achieve a BER of 1 × 10−12.

With such an improvement, backplane signal speed could increase from 1.25 Gbits/s up to 6.25 Gbits/s while achieving a BER that approaches 1 × 10−17. By incorporating chips that include Quellan's noise-cancellation technology, the switch cards that plug into the backplane can attain higher throughputs without changing the backplane. This, of course, saves a considerable amount of money.

Developed by Quellan and manufactured by National Semiconductor Corp., the CSP-Nx600 chips employ a scheme Quellan calls collaborative signal processing to cancel the crosstalk noise. Each chip includes a single- or dual-channel cancellation and feed-forward equalizer that performs the noise cancellation and system analysis. Up to 6 dB of crosstalk noise can be cancelled at data rates of 5 or 6.25 Gbits/s. The chips complement the technology used in the serializer/deserializer circuits offered by National and other companies. Samples of the chip, housed in 5-mm2 24-lead plastic QFPs, are immediately available for less than $20 in volume.

Quellan Inc.

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