Electronic Design

One-Time-Programming Storage Becomes Embeddable IP

One-time-programmable (OTP) nonvolatile storage arrays based on antifuse programming elements and floating-gate storage cells are now available as blocks of intellectual property (IP). The IP comes by way of Kilopass Technology Inc. and eMemory Technology Inc., respectively.

Kilopass' XPM storage-array IP ranges in capacity from as little as 8 bits up to 1 Gbit. It's available in 180-, 150-, 130-, and 90-nm process options. The XPM antifuse technology uses standard CMOS processes. No additional masks are needed to integrate the storage into the chip. Read access times run about 30 ns (for a 1-Mbit array in a 180-nm process).

The current implementation scheme uses the equivalent of 1.5 transistors per memory cell, which limits memory density to about 64 Mbits. A one-transistor memory cell, currently being developed, will allow the gigabit capacity. Programming current is about 100 µ A/bit, while the read current approximates out at 10 µ A/bit.

The Neobit OTP floating gate memory arrays crafted by eMemory range from 256 bytes to 64 kbytes. Specialty arrays with word widths of 14 bits come in 2-, 8-, or 16-kword depths. Also available are extremely small arrays with capacities of 8, 16, 32, and 128 bits. All options have standard CMOS process nodes of 0.5 to 0.18 µm.

Memory blocks from both companies can be obtained as blocks of hard IP. They can be embedded on the chip, eliminating the need for external flash or EEPROM storage.

Kilopass Technology Inc.


eMemory Technology Inc.


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