Electronic Design

SDRAM Chip Set Boldly Goes Where No Man Has Gone Before

When it comes to achieving more memory in the same amount of space, we typically talk about process shrinks, die stacking, multichip packaging, and other techniques. But MetaRAM, a fabless company that recently “de-cloaked,” has shot its new DIMM-based SDRAM torpedoes into the market and scored a direct hit.

Web 2.0-type applications are causing bottlenecks in memory usage. Also, processing power is doubling every 18 months while DRAM capacity doubles only every 36 months. So far, the industry has countered this two-pronged attack with higher capacity and much more expensive DRAM-based dual-inline memory modules (DIMMs). Meanwhile, another unfortunate side effect of the increase in memory bandwidth is a reduction in the number of DIMMs per channel. As the bandwidth has increased from 533 to 1600 Mbits/s, for example, the number of DIMMs per channel has fallen from four to one.

MetaRAM’s MetaSDRAM chip set not only increases the capacity of a DRAM-based DIMM by a factor of four, it’s also significantly cheaper and uses less power than technologies that use other methods to attain the same capacity on a DIMM (Fig. 1). The increased capacity is realized without any infrastructure or software changes (Fig. 2).

The chip set, which comprises two ASICs, allows for the DIMM capacity. The Access Manager is responsible for address and command management, and the Flow Controller handles the data. The chip set sits between a system’s memory controller and the chip-stacked DRAMs that sit on a DIMM. It then routes the read, write, address, and data signals to the appropriate DRAM, and the system memory controller is none the wiser. As a result, the chip set looks like DRAM to the system controller and like a system controller to the DRAM.

MetaSDRAM is designed with power and performance in mind. Its WakeOnUse power-management feature keeps the on-DIMM DRAMs in sleep mode whenever possible. So because the chip set acts as the memory controller, it knows which DRAMs should be sleeping, and it can anticipate the likely targets of the next access. This enables the DIMM to operate within the required thermal and power envelope of a “regular” DDR2 SDRAM, only drawing about 2.5 W on the higher side.

Fred Weber, CEO of MetaRAM, says that MetaSDRAM costs about 2% in latency overhead, which isn’t bad given the memory increase, cost, and reduced power. “I’ve spent my career focused on building balanced computer systems and providing compatible and evolutionary innovations,” he says.

The reward for his efforts show up in MetaRAM’s products, which are able to circumvent “the normal limitations set by the memory controller” and have “accelerated memory technology development by two to four years,” according to the company.

This DIMM-based solution targets the AMD and Intel general-purpose computing platforms and the Appro, Colfax, Rackable Systems, and Verari System servers. It also suits multiprocessing applications where the central processors are underused while the memory is being saturated, like CAD/EDA simulations, database transaction processing, digital content creation, and especially virtualization. Industries like animation, financial services, automotive, medical, aerospace, and semiconductor design/ simulation will find the most benefit from using this technology.

The company currently offers 8-Gbyte R-DIMMs through both Hynix Semiconductor and Smart Modular Technologies, which charges $1500 per unit. The 8-Gbyte version is in full production, and MetaRAM is hammering out a 16-Gbyte version with the chip-set qualification phase completed.

And with companies like Intel eying the registered DIMM market, one has to wonder how long it will be before MetaRAM hosts an IPO or acquisition party. And when it does, I’ll bring the Klingon Warnog ale.

METARAM www.MetaRAM.com

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