Flash Raises Memory-Subsystem Throughput

Feb. 1, 2004
In the memory arena, various technologies and architectures have set their sights on handhelds. Among the latest competitors is a 64-Mb Flash-memory device that boasts high performance. The MT28F644W18, which is sampling from Micron Technology, was...

In the memory arena, various technologies and architectures have set their sights on handhelds. Among the latest competitors is a 64-Mb Flash-memory device that boasts high performance. The MT28F644W18, which is sampling from Micron Technology, was developed specifically for mobile applications. As a 1.8-V-core Flash-memory device, it supports an input/output (I/O) voltage of 1.8 V. This device also claims to be very fast.

The Flash-memory architecture promises enhanced performance feature sets, such as a flexible 4-Mb multi-partitioned architecture and clock suspend. Its fast programming algorithm is expected to meet performance demands for emerging mobile platforms. By allowing more partitions, the architecture supports code segmentation for different applications. It should yield improved efficiency.

Thanks to the clock-suspend feature, a burst sequence can be suspended for the retrieval of data from another device on the same bus. The burst sequence can resume at a later time with no initial-access latency penalty. The fast-programming algorithm feature enables fast data-stream programming (3.1 µs/word typical) when the in-factory voltage is set to 12 V (Vpp = 12 V). At an in-system voltage of 1.8 V (Vpp = 1.8 V), the same fast data-stream programming makes programming and assembly easier.

This 64-Mb device is organized as 4 Mb × 16. It is available in a fine-pitch ball-grid-array (FBGA) package.

Micron Technology, Inc.8000 S. Federal Way, Boise, ID 83707; (208) 368-3900, www.micron.com.

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