Electronic Design

Serial Interconnection May Supplant The Parallel Interface Between The CPU And The Hard Disk

When it comes to the interchange of data between the CPU and internal and external storage hard-disk drives, "The parallel approach is simply running out of gas." This is the opinion of Steve Tirado, executive vice president, marketing and business development, Silicon Image Inc., Sunnyvale, Calif. "The bottleneck has been that interface," he says. "Disks have been getting faster and faster. But getting the data off the drive and into the system, and vice versa, has been hampered by the parallel interface."

That's why SI is building on its know-how in high-bandwidth, low-cost, semiconductor technology. First employed in display technology, SI intends to carry this experience into data-storage applications. SI has a proven track record in the PC-display market. In this area, it's now focusing on a technology that will help take it from analog to digital technology. Crucial to this effort is its high-bandwidth, low-cost semiconductor solution ("Two-Chip Set Safeguards Digital Video Content," electronic design, June 12, p. 69).

With its series of interface devices, the company has broken the $1 per gigabyte barrier. To date, more than 11 million units have been shipped. Also, PanelLink, the name for this technology, has become the established digital visual interface (DVI) specification.

A serial interface lends itself better to scalability because there are two options for raising the data storage rates in a parallel interface: increase clock speed or widen the bus width.

Rates have escalated from 66 to 100 MHz, but the industry feels they can't go much higher. As clock speeds rise, skew caused by any slight variations in path lengths or propagation delay rates are more likely to cause errors in the data. If data arrives late, or early, in a bus that is 80 bits wide, any skew is liable to exacerbate the situation, thereby raising the likelihood of an error (see the figure). As the frequency rises, the window narrows, but of course, the skew doesn't change. Increasing the bus width, say going from 40 to 80 lines, becomes too cumbersome topologically and physically. As Tirado says, "A nice thin serial cable is so easy to route."

Another serial feature is scalability. The serial interface will scale up to multiple gigabits per second; the ATA spec projects rates of 1.5, 3, and 6 Gbits/s.

About a year ago, the serial ATA working group was formed because PC and disk-drive manufacturers recognized that they needed something new. They decided that "going serial" was the right approach. The group is now developing the specification and pursuing serial ATA as a successor to parallel-bus technology. Initially, SI intends to address the system interface between the CPU and the internal hard disk. This area is receiving increased attention from PC OEMs and disk manufacturers alike.

In the second phase, SI will address the interface between host systems and external storage devices. This market is expanding more rapidly than the internal storage market. Increased storage requirements for e-commerce and digital video editing/production, as well as storage area networks and network-attached storage, are fueling this growth.

By acquiring Zillion Technologies, San Jose, Calif., SI obtained some ex-pertise in storage systems and related semiconductor de-sign. A developer of high-speed transmission technology for data storage applications, this company will help SI realize the first stage of its storage strategy. Zillion helped draft the preliminary serial ATA specification. Also, it developed the serialization and deserialization logic for the serial ATA prototype demonstrated at the February 2000 Intel Developer Forum.

SI believes the serial ATA technology cost will eventually be comparable to the cost of today's parallel ATA technology—just as the digital display interface cost has fallen in line with analog versions.

TAGS: Components
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