Electronic Design

Super-Resolution Processing Technique Tackles Display With Super-High Pixel Counts

Super-resolution displays stem from the convergence of computer graphics and video signals, bringing the promise of unprecedented, high-quality, visual content to homes and businesses. Quad XGA (QXGA) features 2048 by 1536 pixels, quadrupling the XGA total. WUGA-resolution displays have 1900 by 1200 pixels. That's 3.15 million and 2.28 million pixels, respectively. The challenge is figuring out how to drive these displays.

Robert Greenberg and Les Decker of Pixelworks Inc., Tualatin, Ore., have a solution. Their paper at the Society for Information Display (SID) Symposium in Long Beach, Calif., detailed a parallel-processing design for super-resolution displays. It uses mass-produced components that reduce cost and enable a faster time-to-market. The design also successfully addresses the two major super-resolution issues.

First, super resolution requires very high input and output bandwidths to drive the large number of pixels. So far, according to the authors, conventional display controllers haven't been able to support such bandwidths. They tend to run into memory and size limitations when they try to capture, process, and scale signals.

Second, convergence of content means that there is now a multiplicity of input signals. These include everything from low-resolution VGA to high-speed Internet, HDTV, broadcast analog TV, and new DVI video signals. Image-processing designs that can handle such a wide range of input signals are necessary to deliver these signals to super-resolution displays.

The Pixelworks design is based on an image-processing chip, the PW364, also developed by Pixelworks. This chip consolidates 10 display components into a system-on-a-chip. Scaling ensures that a match is achieved between the incoming resolution, be it a low VGA signal or a really high SXGA signal, and the display's native resolution. Scaling may be up or down. A function called autoimage detection looks at the incoming signal, identifies it, and then optimizes the processor output for that signal.

Parallel imaging processing is another feature that assists in handling the bandwidth. The display is split in half (see the figure). One PW364, designated the master, drives the left-hand side of the display. A second processor, the slave, drives the right half. The challenge is timing the arrival of the data at the screen perfectly so the images form at the right time. The signal enters the display at the top line and overscans a little bit into the display's second half. When the slave picks up the arriving signal, it starts to the left of the center and goes all the way to the right.

The final feature is called intelligent scaling. It ensures that a single, continuous image is displayed in the overlap region. As explained, the master chip scans just past the centerline. The slave chip begins just at the left of the centerline and continues to the right edge of the image, creating an "overlap zone." Pixelworks employs some proprietary algorithms to "look" both backward and forward and ensure that no centerline is discernible at midscreen.

For more information, point your browser to www. pixelworksinc.com.

TAGS: Components
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