Electronic Design

32-Bit Core Shrinks

Atmel's AVR32 line (see "A New Player In The 32-Bit Processor Field") has a more compact sibling, the AT32UC3A. This 66-MHz, 80 MIPS chip cuts the pipeline down to three stages and removes the Java support, but it adds more bit field instructions and better interrupt handling (see figure).

The single-cycle fractional multiply/ add/accumulate (MAC) and the DSP instructions are retained. The cache is gone, but this makes the system more determinant, which is critical in the low-power applications it targets. A split flash memory uses staggered access to double instruction delivery speed.

The memory management unit has been replaced with a memory protection unit that's more common in low-end embedded platforms. It handles 16 independent regions. The main bus matrix is designed to handle numerous bus masters. The USB On-The-Go (OTG) can be a master or slave device. Nexus-compatible trace support augments the JTAG debug support.

The 3.3-V chip draws only 35 mA at 66 MHz. It has 64 kbytes of SRAM and 512 kbytes of flash. Pricing starts at $8.67.


TAGS: Digital ICs
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