Optimism wafted through the air at this year's Design Automation Conference (DAC) in San Diego. EDA vendors and industry analysts exuded confidence that the semiconductor industry has truly turned the corner and is primed and ready for a new generation of tools. The 41st DAC had a swagger about it and for good reason: It drew the highest attendance levels since 2001, with more than 5500 attendees and 4900 exhibitors convening on the sold-out exhibit floor and in the sessions.
That sentiment was buoyed at the annual Gartner Dataquest reception and briefing. Gartner analysts presented a fairly robust growth forecast for semiconductors. ASIC and FPGA analyst Bryan Lewis sees the semiconductor industry growing at a 24% clip in 2004 and almost 14% in 2005, which certainly bodes well for the EDA industry. Lewis added that significant growth will occur in array-based platform ASICs. Expect design starts for these implementation styles to reach 1000 or more annually by 2007, says Lewis.
Design reuse is growing, too, according to Gartner's IP analyst Jim Tully, giving further cause for optimism in EDA. The IP industry is now over the $1 billion mark in annual revenue, fueled largely by strong growth in bus interface/USB and DSP IP. While the 2001 semiconductor downturn resulted in the failure of a number of IP houses, an accompanying engineering surplus drove a lot of IP development in-house at systems companies.
Now the IP business is busting out, with 22% growth forecasted for this year and a similar growth rate expected through 2007, by which time the IP industry will be a $25 billion market. It'll have to be--by then, 65-nm processes will populate the mainstream. Designers will need all the help they can get filling up on functionality.
As in years past, EDA analyst Gary Smith continued beating the drum for electronic-system-level (ESL) design, but this time with a quiet confidence that ESL has finally arrived. Smith sees designers starting to make the move to ESL. At the same time, Smith observes swelling of physical design teams. The result, he claims, is a move from RTL design to the "seams of EDA," which are design for manufacturing and what Smith terms "design for software." The latter refers to the trend for successful large designs to address software design early in the hardware-design cycle.
Some of the biggest news at DAC involved acquisitions: Hier Design being acquired by Xilinx; Synchronicity nabbing MatrixOne; and Mentor Graphics' purchase of 0-In Design Automation. The former signals Xilinx's intent to beef up its software offerings by adding Hier's ASIC-like virtual prototyping for FPGAs. The latter is an interesting addition by Mentor of a promising assertion-based verification technology.