Built with structured ASIC libraries, or structured ASIC fabric, a line of Embedded Array products from ChipX allows designers to make substantial logic changes, corrections, or additions to the device using a completely standard automated tool flow. To date, ASIC designers had to choose either a fully customized product (standard cell) or a fully configurable structured ASIC. The new Embedded Array products are based on the ChipX’s patented X-Cell configurable logic, combined with standard-cell I/O and memory structures, and optional mixed-signal IP—all matched exactly to an application. The new devices are based on a 130-nm high-speed process from Taiwan foundry provider United Microelectronics Corp. (UMC).
Because almost all building blocks used in an Embedded Array are from standard-cell libraries, performance of the complete component is very similar to a standard cell, both in terms of power and maximum speed. Achievable logic speeds are typically less than 10% below standard-cell performance, in the same process. ChipX Embedded Array products can incorporate more than 8 million true ASIC gates, 10 Mbits of memory, and various mixed-signal PHY cores (such as PCI Express, USB 2.0, and DDR/DDRII). They can also include analog cores such as PLLs, ADCs, and DACs along with 800 standard-cell I/Os, including LVDS, HSTL, SSTL, and LVCMOS. A broad range of packages is available for this family of products.
ChipX Embedded Arrays in UMC’s 130-nm high-speed HS process technology are available now.
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