Digital ICs/DSP: Mobile DDR SDRAMs Deliver Lowest Power Drain, Improved Reliability

June 23, 2005

The Endur-IC family of mobile double-data-rate (DDR) memory chips feature multiple densities. The chips' internal architecture delivers aggressive power specifications, high bandwidth, and increased reliability over standard SDRAMs. The memories can operate over the full industrial temperature range of 40°C to 85°C. They also can employ the company's stacked DRAM process to deliver shorter latencies, higher speeds, and the industry's lowest standby current (as little as 140 µA at 1.8 V and 45°C). Temperature-compensated self-refresh automatically adjusts the refresh rate to compensate for internal temperature changes. Partial-array self-refresh lets users control refresh conditions to extend battery life. The Endur-IC memories are available in 128-, 256-, and 512-Mbit capacities with all three available in 16-bit wide organizations and in 60-contact fine-pitch BGAs. The 512-Mbit device also comes in a 32-bit wide option. Contact the company for volume pricing.

Micron Technology Inc.www.micron.com

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.