Digital ICs/DSPs: On-Chip Viterbi Coprocessor Frees Up DSP For Additional Tasks

Dec. 8, 2004

Balancing cost, memory needs, and performance, the TMS320C6418 DSP chip takes aim at telecommunications, soft-radio, and broadcast applications. Based on the TMS320C64x core, the 'C6418 packs 512 kbytes of level 2 cache, a Viterbi coprocessor, and an arithmetic unit that can perform up to 2.4 billion 16-bit multiply-accumulate operations/s (or 4.8 billion 8-bit MACs/s). The dedicated Viterbi coprocessor saves about 30% of the DSP engine's processing resources, freeing the engine to handle other tasks. Also on the chip are two multichannel serial ports, two audio serial ports, a 16/32-bit host interface, and two I²C serial control ports. Housed in a 23- by 23-mm flip-chip 288-contact BGA package, the 600 MHz version sells for $49.50 apiece in lots of 10,000 units.

Texas Instruments Inc.
www.ti.com/c6418pr

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.