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DSP, µC And Power Management Circuitry Tightly Melded Together In New Generation Of Wireless Chips (1)

High performance and long battery life are promised for next-generation wireless communications devices employing chips based on a brand new architecture that melds together digital signal processor, microcontroller and power management circuitry. Jointly developed by Intel Corp. and Analog Devices Inc., the new, highly-integrated Micro Signal Architecture also integrates dual MACs, dual 40-bit ALUs, and a single barrel shifter in the chips and is supported by a simplified programming model that allows developers to write signal processing and control code in C and C++. In addition, profiling tools are provided for automatically identifying signal processing "hot spots" requiring further optimization by the programmer.
The core architecture also supports dynamic power management. This feature continuously monitors software and enables dynamic adjustments of both the voltage delivered to the core and the frequency at which the core is running to optimize the power delivered for a task. The architecture has also been optimized to process bit streams for multimedia running on battery-powered equipment. Tuned instructions are said to provide up to ten times the performance of other DSPs. The new, easy-to-program DSP architecture is well-suited for processing video, image, voice and data in communications tasks. Developers can access specs and development tools for the new core architecture through the Joint Development Website. Products based on the core will be developed and marketed separately by Intel and Analog Devices, with the first products scheduled to enter the market in early 2001. See "DSP, µC And Power Management Circuitry Tightly Melded Together In New Generation Of Wireless Chips (2)".


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