FPGAs Balance Price And Performance

Aug. 1, 2004
Introduced as the market's most cost-effective FPGAs, the LatticeECP-DSP and LatticeEC FPGA families target high-performance DSP applications and general-purpose FPGA applications, respectively. Both families are fabricated using a Low-k, 130-nm CMOS

Introduced as the market's most cost-effective FPGAs, the LatticeECP-DSP and LatticeEC FPGA families target high-performance DSP applications and general-purpose FPGA applications, respectively. Both families are fabricated using a Low-k, 130-nm CMOS process with copper metallization provided by Fujitsu and operate from a 1.2V supply. The LatticeECP-DSP devices employ sysDSP blocks that support multiply, accumulate, summation, and pipelining functions. Each block is programmable for one 36 x 36, four 18 x 18, or eight 9 x 9 multipliers. They will be available in densities from 6K and 41K LUTs (lookup tables) with I/O counts from 97 to 576 in TQFP, PQFP, and FPBGA packages. Integrating features for high-volume applications, LatticeEC devices employ low-cost SPI flash memory, said to be an option not previously enlisted by FPGA makers. They will be available in densities between 1.5K and 41K LUTs and in the same package options as their counterparts. Samples of the 20K LUT ECP-DSP20 and EC20 in FPBGAs are available now, priced at $59 and $49 each/1,000, respectively. LATTICE SEMICONDUCTOR CORP., Hillsboro, OR. (503) 268-8000.

Company: SEMICONDUCTOR CORP.

Product URL: Click here for more information

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