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Highly Integrated SOCs Target Audio And DSP Apps

Using 0.18µ CMOS technology, the STPC Galaxy family of x86 PC-compatible system-on-a-chip (SOC) devices claims to achieve high integration and performance with low power dissipation. The heart of these SOCs is a new core known as the CP250. This is a Pentium-II class processor with a fast FPU with triple-issue MMX technology that is well-suited for use in audio and DSP applications, such as soft modems, GSM protocol, soft DVD, and digital imaging. The triple issue integer unit includes a six-stage pipeline with bi-directional data pre-fetching and no data misalignment penalty. Core clock speeds up to 300 MHz are possible, with programmable host clock ratios of 1x, 2x, 2.5x, 3x and 3.5x. Design techniques used to minimize the power used in redundant logic switching include an automatic clock stop on unused blocks and software-driven clock throttling to tailor performance to the application. Power consumption versus frequency and power supply under typical conditions (20% active, 80% idle) ranges from 1,100 mW at 250 MHz/1.8V down to 200 mW at 66 MHz/1.3V. The first two members of the STPC Galaxy family are the STPC Vega and STPC Pictor.


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TAGS: Digital ICs
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