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PHY Processor Optimized For PLSP

Debuting as the industry's first IP core optimized for universal physical layer signal processing (PLSP), the UniPHY core's custom instructions and architectural features specifically target such PLSP applications as wireless LAN (802.11a, 802.11b, HiLAN2) and xDSL. Capable of handling speeds of 400 MHz and 1 GHz, the processor combines an accelerated version of the super-scalar SIMD architecture and SP-X instruction set with an expansion instruction mode. The 64-bit wide expansion instructions execute up to 12 parallel arithmetic operations per cycle with additional built-in load and store capabilities. The core is available for licensing along with compiler, assembler, debugger and simulator tools. A reference chip and application software that includes 802.11a, 802.11b, HiLAN2 and SPEEDi are also available. 3DSP, Irvine, CA. (949) 435-0600.


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TAGS: Digital ICs
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