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Power Driver Scores A Whole In One

David Tam explains how the latest high-voltage IC technology can consolidate components on a single piece of silicon that can operate in the high-voltage and noisy environment of motor-drive circuits for domestic and industrial servo applications.

Variable-speed drives are the future for energy-efficient operation of electric motors for domestic appliance and industrial servo applications. However, conventional, discrete implementations cannot deliver the cost and size reductions necessary to ensure their widespread market acceptance.

To deliver considerable energy savings, variable-speed motor drives must perform more sophisticated functions than their predecessors, including IGBT protection and linear current feedback for control purposes. Both of these require accurate motor current sensing, which is normally performed by bulky discrete components; either a group of Hall-effect devices or a combination of shunt resistors and optically isolated linear current-sensing devices. However, the IGBT protection and motor current sensing circuits of AC PWM motor drives can be simplified substantially by integrating the gate drive, protection, and sensing functions using high-voltage integrated-circuit (HVIC) technology.

HVIC technology enables the fabrication of a monolithic driver IC, featuring a low-side grounded CMOS circuit and high-side floating CMOS separated by an N- or P-channel LDMOS region. The LDMOS performs level shifting to transfer control signals across the high-voltage barrier between the low-side and high-side circuits. IGBT gate-drive circuits are implemented in enhanced voltage CMOS with supply rails up to 25V.

HVIC devices also allow analogue and digital power conversion control—including pulse width modulator (PWM), voltage control oscillator (VCO), precision sense amplifier and fast fault comparator functions – to be implemented on the same piece of silicon in BiCMOS technology.

A single HVIC device can integrate the six IGBT gate drivers needed for a 3-phase gate-drive solution, as well as IGBT de-saturation protection in each high- and low-side output along with a soft shutdown feature.

Over-current is detected by sensing the IGBT collector-emitter voltage in the ON state through an external diode. (Figure 1 shows the functional block diagram of a HVIC 3-phase gate driver with IGBT protection.) The VCE is then compared with a fixed 8V threshold, and the resulting signal is filtered for 1µs.

A blanking filter of 3µs is also applied to remove the tail at the turn on of the IGBT. Once desaturation is detected, the output stage immediately enters a high impedance state and the SSD driver is activated, turning off the IGBT through the 75W internal impedance of the SSDH/L pin. The SSD driver is held for 7µs to allow the IGBT to discharge smoothly, and an external resistor can be added for more control of the discharge rate.

The short-circuit detection information is shared with the other high- or low-side drivers through the SY_FLT I/O pin. Once active, this signal freezes the output status of all other drivers regardless of their input conditions. The main driver itself freezes its status until the SSD takes place.

When the soft shut down is completed, the SY_FLT signal is disabled and diagnostic information is sent by the FAULT/SD pin to the host MCU. The main driver then pulls down the FAULT/SD line, forcing a hard shutdown by turning off all other drivers in the local network. The faulty condition is reported to the main controller for diagnostic purposes.

IGBT desaturation is sensed by an external HV diode, which reads the collector voltage. The diode is normally biased by an internal pull-up resistor connected to the local supply line (VB or VCC). When the transistor is ON, the diode is conducting and the current flowing in the circuit is determined by the internal pull-up resistor, which is usually around 100kW.

An Active Bias structure is also provided at the DSH/L pin to reduce the noise effect of current flowing through the diode parasitic capacitance and the internal pull-up when the IGBT is turned OFF. The DSH/L pins present an active pull-up respectively to VB/VCC, and a pull-down respectively to VS/COM.

The dedicated biasing circuit reduces the impedance on the DSH/L pin when the voltage exceeds the VDESAT threshold. When the IGBT is fully on, the sensing diode gets forward-biased and the voltage at the DSH/L pin decreases. At this point, the biasing circuit deactivates, in order to reduce the bias current of the diode.

The motor current is sensed using an external shunt resistor in the path of the motor phase current such that only the fundamental component of the motor current is processed. The HVIC converts the small differential voltage (±250mV) into a time interval through a precise circuit that also performs good ripple rejection, showing small group delay. The time interval is level-shifted and presented to the output.

An analogue output voltage proportional to the measured current is provided, too, for comparison with an external voltage reference. The maximum throughput is 40ksamples/s. This is sufficient for up to 20kHz asymmetrical pulse-width modulation. The maximum delay is <7.5µs (@20kHz). A fast over-current signal is also provided for IGBT protection. Figure 2 shows the current-sensing arrangement.

One particular advantage of HVIC in this application is its ability to sense a small differential voltage floating on top of a large common-mode voltage (600V to 1200V max) also includes fast transients due to the action of the IGBT inverter phase. A noise-immune, bidirectional, level-shifting circuit prevents false common-mode dV/dt noise up to 50V/ns.

The HVIC integrates an advanced filtering stage with PWM synchronisation. The signal path can be viewed as four stages in series (Figure 3). The first two stages perform filtering, stage three generates the PWM output signal, and stage four performs analogue reconstruction to interface with the torque control loop of the MCU or DSP.

The input filter stage is a self-adaptive, resettable integrator that performs accurate ripple cancellation and rejection of high-frequency noise. This stage extracts the PWM frequency from the synchronisation signal and inserts transmission zeros to cancel even harmonics.

The second stage samples the result of the first stage at twice the synchronisation frequency, to remove the odd harmonics from the input signal. To perform this cancellation, the SYNC signal must be shifted 90° with respect to the triangular carrier edges (SYNC2). Figure 4 shows phase voltage and a simplified phase current of a motor drive together with the triangular SYNC2 signal.

The trend toward using high-voltage IC technology is accelerating as demand for greater energy efficiency forces the pace of development of variable speed industrial and appliance motor drives. These HVICs are uniquely capable of integrating high voltage functions and sophisticated sense and control circuitry, to enable drives that are more-efficient, more-compact drives that deliver advanced performance at lower cost.

TAGS: Components
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