ASICs, Structured ASICs, And FPGAs

How close in performance and integration are FPGAs and ASICs? Advances in FPGA architectures and the use of 90-nm process rules have allowed the latest generation of FPGAs to achieve levels of integration and performance comparable to many ASICs. The la

Dave Bursky

Jan. 12, 2006

How close in performance and integration are FPGAs and ASICs?

Advances in FPGA architectures and the use of 90-nm process rules have allowed the latest generation of FPGAs to achieve levels of integration and performance comparable to many ASICs. The latest SRAM-based FPGAs can deliver multihundred-megahertz operating speeds. The basic logic fabric can contain millions of configurable logic gates, several million bits of RAM, dedicated multiplier-accumulator blocks, phase-locked loops (PLLs), high-speed buffers, and multigigabit serializer-deserializer ports.

ASICs are custom crafted, so they don't have standard features. Yet today's mainstream ASIC designs often fall into the same general rangeof complexity as the latest FPGAs. Still, the configurable SRAM-based lookup-table (LUT) logic cells in the FPGA fabric aren't as area-efficient as the basic gate building blocks used in ASICs. As a result, FPGA chips are significantly larger and have slightly lower performance than equivalent-complexity ASICs. However, with the right design optimization, designers can often meet their performance goals with an FPGA.

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About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.