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Mentor Graphics, Mathworks Optimize FPGA Design Flow

Mentor Graphics has upgraded its Precision Synthesis tool to include hardware description language (HDL) generated by MathWorks Simulink HDL Coder. Customers will be able to transfer VHDL and Verilog generated by Simulink HDL Coder into the Precision Synthesis tool, optimizing FPGA design flow, according to Mentor. The upgrade affects Precision 2006a release or newer. Mentor and Mathworks collaborated on the flow to assure interoperability. "Simulink HDL Coder and Precision Synthesis provide a rapid path from Simulink models to FPGA implementation," Ken Karnofsky, director of marketing, signal processing and communications for MathWorks, said in a statement. Precision Synthesis is a comprehensive solution for FPGA design, and is the only synthesis tool that offers push-button multi-vendor physical synthesis, according to Mentor. Simulink HDL Coder generates bit-true, cycle-accurate, synthesizable Verilog and VHDL code from Simulink models, Embedded MATLAB code, and Stateflow charts.

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