Startup Seeks To Automate Software Reuse For FPGA-Based Development Efforts

April 13, 2006
Typical next-generation system development projects attempt to reuse software from the previous generation. But a next-generation system screams for a next-generation processor architecture, and therein lies the rub. Often, when developers set

Typical next-generation system development projects attempt to reuse software from the previous generation. But a next-generation system screams for a next-generation processor architecture, and therein lies the rub. Often, when developers set out to migrate the embedded software from a previous processor architecture to a new one, all they have to go on is the assembly or binary code since it was developed for performance or memory reasons at the assembly language level. The time and effort involved in manually translating legacy binary or assembly code from an older processor onto a newer hardware platform causes many designers to avoid this task altogether.

Binachip is a startup that has developed a technology to automate the translation of software to a new platform, cutting the development time required for software reuse from months to hours. Beginning with a binary program, the code is profiled using standard tools. If it is determined that a portion of the code will benefit from a hardware implementation, it is automatically compiled into hardware on an FPGA. The remaining code segments are then translated into binary for the target processor. Depending on the application, the resulting implementation can provide a 10X to 50X speedup over a pure software implementation.

The company's first product, Binachip-FPGA, will ship in the second half of 2006. Pricing has not been announced.
Binachip
www.binachip.com

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