There's no question that FPGAs make the ideal platform for prototyping most digital systems. In some cases, FPGAs are available at a price point that makes sense in production volumes. On top of that, FPGA vendors have made significant strides in creating easier-to-use FPGAs by continuously improving their low-cost software tools and predominately free intellectual-property (IP) libraries.
However, there are compelling cases where FPGA prototypes must be converted to an ASIC for deployment. Examples include when the product will run in volume; where the high power consumption of FPGAs is unacceptable; where single-event upset (SEU) must be minimized; or where design security is paramount.
But how difficult is it to convert an FPGA to an ASIC? Increasingly, the answer depends on, to a large degree, the IP used in the FPGA. Converting IP from an FPGA to ASIC is more of a legal problem than a technical problem, particularly if the IP is proprietary to the FPGA vendor and the vendor isn't willing to license the IP for ASIC usage. On one hand, free FPGA IP facilitates design. But on the other hand, it locks the design into the FPGA device and creates a barrier to porting the design to another technology.
Eyeballing the economics, we can see that free IP from an FPGA vendor can actually be quite expensive. Let's look at an example. Our project is to build a secure processing bridge chip that requires an Ethernet media access controller (MAC), a USB controller, and a DDR2 controller.
Projected product volumes are 20k units per year. The complexity level requires us to use an FPGA that has volume pricing of $50. We approach an ASIC vendor and obtain volume pricing at $25 with a $250,000 nonrecurring-engineering (NRE) cost for the ASIC, plus an additional charge of $150,000 for the IP licenses.
The figure shows the cost of ownership associated with staying in the FPGA or converting to an ASIC. The astounding fact is that the break-even point for the ASIC occurs in the first year. Even more astounding is that the $150,000 IP licenses—when leveraged into an ASIC—result in a three-year savings of $1.1 million. That's an excellent return on investment by any measure.
Of course, this tells us what we already know: FPGAs can be expensive in volume production. Such analysis reveals that though the FPGA IP is free, we may not have known it comes at the price of expensive FPGA silicon.
So what can you do to position yourself to exploit the benefits of FPGA prototyping and be able to convert the IP to an ASIC? Use IP that's available in both FPGA and ASIC implementations. In some cases, you may be able to obtain FPGA-compatible IP from the ASIC vendor. But in most instances, the best way is to license FPGA and ASIC compatible IP directly from third-party IP vendors.
The idea is to either license RTL or FPGA and ASIC netlists for the IP cores. The trick is to negotiate with the vendor to obtain a license for FPGA prototyping and ASIC production up front before beginning design work. That way, you can get the most favorable terms and keep your design technology independent, and technology independence is key to reducing costs over time.