The HyperTransport Consortium has released version 2.0 of the specification defining new enhancements to the HyperTransport I/O Link interface. The 2.0 release defines three new speed levels and a new mapping to PCI Express, an emerging I/O interconnect architecture. The three speed specifications define 2.0-, 2.4-, and 2.8-Gtransfer/s performance levels using dual-data-rate clocks of 1, 1.2, and 1.4 GHz, respectively. This boosts the maximum aggregate throughput of a HyperTransport interface to 22.4 Gbytes/s. The electrical protocols that support the new clock rates are backward-compatible with previous versions of the HyperTransport electrical specifications. The HyperTransport consortium licenses the technology royalty-free. For more information, go to www.hypertransport.org.