Electronic Design

Modified IC Process Grows Carbon Nanotubes On 6-in. Wafers

A crucial breakthrough has been achieved by Infineon Technologies, Munich, Germany, for growing carbon nanotubes (CNTs) on 6-in. silicon wafers. The modified CVD process, which does not use plasma enhancement, enables the growth of CNTs at lithographically defined locations. This eliminates the need to rearrange and handle CNTs on-chip (see the figure).

CNTs, a third form of carbon that belongs to the Fullerene family, feature extremely high conductivity and electrical resistance that's independent of their lengths. They have extremely high current densities of up to 1010 A/cm2 (copper melts at 107 A/cm2), thermal conductance that's higher than diamond's, and excellent me-chanical stability.

Many of the modified process' parameters, like temperature and materials, are completely compatible with standard semiconductor pro-cesses. The highly parallel batch process allows CNTs to be grown on metallic surfaces, where they can connect two separate metallic layers.

Most CNT researchers have grown CNTs on oxide surfaces where the tubes are not electrically contacted, requiring an extra lithographic step. They also use electric-arc discharging or laser ablation to grow CNTs, techniques that are difficult to combine with semicon-ductor technology and don't scale up.

"Our approach prevents contamination due to the catalyst as we deposit the catalyst only where we want to grow CNTs," explains Franz Kreupl, a researcher on the Infineon Nano-Team. "Other researchers spread the catalyst over the whole substrate, and the tubes only grow at locations where there's silicon oxide."

The new process uses an iron-based catalyst with proprietary ingredients. CVD is performed from 450ºC to 700ºC by exposing the wafers to a mixture of hydrogen and acetylene gases. Adjustable growth rates up to 50 µm/min. have been achieved.

"Our goal is not to grow CNTs as long as possible, but to do so very precisely," says Kreupl. "We've already grown tubes with lengths exceeding 1 mm in one hour. Typical CNT lengths in microlelectronic applications are about 1 µm, which we can grow in a few seconds. Unlike most researchers who grow CNTs on very small substrates of typically 1 cm2 (some researchers at Stanford University claim they've used 4-in. wafers), we can do so on 6-in. wafers, 25 wafers at a time, with nanotube nonuniformity over the wafer of about 5%."

Infineon envisions the first potential application for CNTs as vias that act as contact bridges between two IC metal layers. Researchers expect that chips will have to cope with current densities of 3.3 × 106 A/cm2 in 10 years, which can be done with CNTs.

For more information, contact Leslie Davis in the U.S. at (408) 501-6790 or Reiner Schoenrock in Munich, Germany, at +49 89 234 29593. Or, go to www.infineon.com.

TAGS: Components
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